ISL9305(2010) View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
ISL9305
(Rev.:2010)
(Rev.:2010)
Intersil
ISL9305 Datasheet PDF : 17 Pages
| |||
ISL9305
I2C Slave Address
The ISL9305 serves as a slave device and the 7-bit default chip
address is 1101000, as shown in Figure 5 According to the I2C
specifications, here the value of Bit 0 determines the direction of
the message (“0” means “write” and “1” means “read”).
MSB
LSB
1
1
0
1
0
0
0
R/W
FIGURE 4. EXPOSED THERMAL PAD
I2C Compatible Interface
The ISL9305 offers an I2C compatible interface, using two pins:
SCLK for the serial clock and SDAT for serial data respectively.
According to the I2C specifications, a pull-up resistor is needed
for the clock and data signals to connect to a positive supply.
When the ISL9305 and the host use different supply voltages,
the pull-up resistors should be connected to the higher voltage
rail.
Signal timing specifications should satisfy the standard I2C bus
specification. The maximum bit rate is 400kb/s and more details
regarding the I2C specifications can be found from Philips.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
FIGURE 5. I2C SLAVE ADDRESS
I2C Protocol
Figures 6, 7, and 8 show three typical I2C-bus transaction
protocols.
S SLAVE ADDRESS 0 A REGISTER ADDRESS A
R/W
OPTIONAL
DATA BYTE 2
A
DATA BYTE N
DATA BYTE 1
A
AUTO INCREMENT
REGISTER ADDRESS
AP
SYSTEM HOST
ISL9305
A – ACKNOWLEDGE
N – NOT ACKNOWLEDGE
S – START
P – STOP
AUTO INCREMENT
REGISTER ADDRESS
AUTO INCREMENT
REGISTER ADDRESS
FIGURE 6. I2C WRITE
S SLAVE ADDRESS 0 A REGISTER ADDRESS A S SLAVE ADDRESS 1 A
R/W
R/W
OPTIONAL
DATA BYTE 1
A
DATA BYTE 2
A
DATA BYTE N
NP
AUTO INCREMENT
REGISTER ADDRESS
AUTO INCREMENT
REGISTER ADDRESS
AUTO INCREMENT
REGISTER ADDRESS
FIGURE 7. I2C READ SPECIFYING REGISTER ADDRESS
SYSTEM HOST
ISL9305
A – ACKNOWLEDGE
N – NOT ACKNOWLEDGE
S – START
P – STOP
9
FN7605.0
November 8, 2010
Share Link: