IT8705F View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
Manufacturer
IT8705F Datasheet PDF : 185 Pages
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Contents
8.9.17 Flash ROM I/F Special Write Mask Based Address LSB Register (Index=D9h, Default=00h)
.......................................................................................................... 57
8.9.18 Flash ROM I/F Special Write Mask Size Control Register (Index=DAh, Default=00h) ........ 57
8.9.19 SMI# Control Register (Index=F0h, Default=00h) ................................................................ 58
8.9.20 SMI# Status Register (Index=F2h, Default=00h) ................................................................. 58
8.9.21 SMI# Pin Mapping Register (Index=F5h, Default=00h)........................................................ 58
8.9.22 Hardware Monitor Alert Beep Pin Mapping Register (Index=F6h, Default=00h) ................. 59
8.9.23 GP LED Blinking 1 Pin Mapping Register (Index=F7h, Default=00h) .................................. 59
8.9.24 GP LED Blinking 1 Control Register (Index=F8h, Default=00h)........................................... 59
8.9.25 GP LED Blinking 2 Pin Mapping Register (Index=F9h, Default=00h) .................................. 59
8.9.26 GP LED Blinking 2 Control Register (Index=FAh, Default=00h) .......................................... 60
8.9.27 Watch Dog Timer Control Register (Index=FBh, Default=00h) ............................................ 60
8.9.28 Watch Dog Timer Time-out Output Pin Mapping Register (Index=FCh, Default=00h) ........ 60
8.9.29 Watch Dog Timer Time-out Value Register (Index=FDh, Default=00h) ............................... 60
8.9.30 VID Input Register (Index=FEh, Default= -- ) ....................................................................... 61
8.9.31 VID Output Register (Index=FFh, Default=00h) ................................................................... 61
8.10 Game Port Configuration Registers (LDN=06h) ............................................................................ 62
8.10.1 Game Port Activate (Index=30h, Default=00h)..................................................................... 62
8.10.2 Game Port Base Address MSB Register (Index=60h, Default=02h) ..................................... 62
8.10.3 Game Port Base Address LSB Register (Index=61h, Default=01h) ...................................... 62
8.11 Consumer IR Configuration Registers (LDN=07h) ........................................................................ 63
8.11.1 Consumer IR Activate (Index=30h, Default=00h)................................................................. 63
8.11.2 Consumer IR Base Address MSB Register (Index=60h, Default=03h) ................................. 63
8.11.3 Consumer IR Base Address LSB Register (Index=61h, Default=10h) .................................. 63
8.11.4 Consumer IR Interrupt Level Select (Index=70h, Default=0Bh) ........................................... 63
8.11.5 Consumer IR Special Configuration Register (Index=F0h, Default=00h) ............................ 63
8.12 MIDI Port Configuration Registers (LDN=08h) .............................................................................. 64
8.12.1 MIDI Port Activate (Index=30h, Default=00h)....................................................................... 64
8.12.2 MIDI Port Base Address MSB Register (Index=60h, Default=03h) ....................................... 64
8.12.3 MIDI Port Base Address LSB Register (Index=61h, Default=00h) ........................................ 64
8.12.4 MIDI Port Interrupt Level Select (Index=70h, Default=0Ah) ................................................. 64
8.12.5 MIDI Port Special Configuration Register (Index=F0h, Default=00h)................................... 65
9. Functional Description.................................................................................................................................. 71
9.1 LPC Interface ................................................................................................................................. 71
9.1.1 LPC Transactions ................................................................................................................. 71
9.1.2 LDRQ# Encoding.................................................................................................................. 71
9.2 Serialized IRQ................................................................................................................................ 71
9.2.1 Continuous Mode.................................................................................................................. 71
9.2.2 Quiet Mode ........................................................................................................................... 72
9.2.3 Waveform Samples of SERIRQ Sequence .......................................................................... 72
9.2.4 SERIRQ Sampling Slot......................................................................................................... 73
9.3 General Purpose I/O ...................................................................................................................... 74
9.4 Power Management Event (PME#) ............................................................................................... 75
9.5 Environment Controller (Enhanced Hardware Monitor and Fan Controller) ................................. 76
9.5.1 Overview ............................................................................................................................... 76
9.5.2 Interfaces .............................................................................................................................. 76
9.5.3 Registers............................................................................................................................... 77
9.5.3.1
Address Port (Base+05h, Default=00h): ............................................................ 77
9.5.3.2
Register Description ........................................................................................... 80
9.5.3.2.1 Configuration Register (Index=00h, Default=18h)............................ 80
9.5.3.2.2 Interrupt Status Register 1 (Index=01h, Default=00h) ..................... 80
9.5.3.2.3 Interrupt Status Register 2 (Index=02h, Default=00h) ..................... 80
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