DIGITAL SIGNAL PROCESSOR
3) Timing Relation of SDAT and SBCK
KS9287
WBCK
SBCK
a1
2
3
4
5
6
7
8
SDAT
b
Q
R
S
T
U
V
W
C
a) After PBFR goes negative edge, SBCK is set to L for about 10 us.
b) If S0S1 is L, subcode P is output, and if S0S1 is H, S0S1 is output.
c) If there are more than 7 pulses input into the SBCK pin, the subcode data P, Q, R, S, T,
U, V, and W data are output repeatedly.
Figure 8. Subcode-Q Data Output Timing Diagram 3
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