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KS9287 View Datasheet(PDF) - Samsung

Part Name
Description
Manufacturer
KS9287 Datasheet PDF : 29 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DIGITAL SIGNAL PROCESSOR
PIN DESCRIPTION
No. Pin Name I/O
Description
1
VDDA
- Analog VDD
2
DPDO
O Charge pump output for Digital PLL
3
DPFIN
I Filter input for Digital PLL
4
DPFOUT
O Filter output for Digital PLL
5
CNTVOL
I VCO control voltage for Digital PLL
6
VSSA
- Analog Ground
7
DATX
O Digital Audio Serial Output
8
XIN
I X'tal oscillator input
9
XOUT
O X'tal oscillator output
10
WDCH
O Word clock output of 48 bits/Slot (88.2 kHz)
11
LRCH
O Channel clock output of 48 bits/Slot (44.1 kHz)
12
SADT
O Serial audio data output of 48 bits/Slot (MSB first)
13
VSS
- Digital Ground
14
BCK
O Bit clock output of 48 bits/Slot (2.1168 MHz)
15
C2PO
O C2 Pointer for Serial audio data
16
TIM2
O Normal or Double speed control output
17
EFMFLAG
O 8 to14 demodulation error flag
18
UDTFLAG O Undesiable T Flag (Lower 3T signal in EFM signal)
19
FSYNC
O Detected Frame Sync
20
EFMZ
O EFM signal demodulated NRZI
21
V34M
O Internal VCO clock (34.5744MHz)
22
TEST0
I Test input (H: Test, L: Normal)
23
RBCK
I Read base clock
24
EMPH
O Emphasis output (H: Emphasis On, L: Emphasis Off)
25
LKFS
O The Lock Status output of frame sync
26
S0S1
O Output of subcode sync signal (S0+S1)
27
RESET
I System reset at "L"
28
SQEN
I SQCK control signal (H: External clock, L: Internal clock)
29
SQCK
I/O Subcode-Q data bit clock
30
SQDT
O Serial output of Subcode-Q data
31
SQOK
O The CRC check result signal output of Subcode-Q
32
SBCK
I Subcode data bit clock
KS9287
5

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