L6227D View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

L6227D

DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLER

STMicroelectronics 

L6227

CIRCUIT DESCRIPTION

POWER STAGES and CHARGE PUMP

The L6227 integrates two independent Power MOS

Full Bridges. Each Power MOS has an Rdson =

0.73ohm (typical value @ 25°C), with intrinsic fast

freewheeling diode. Cross conduction protection is

achieved using a dead time (td = 1µs typical) be-

tween the switch off and switch on of two Power MOS

in one leg of a bridge.

Using N Channel Power MOS for the upper transis-

tors in the bridge requires a gate drive voltage above

the power supply voltage. The Bootstrapped

(VBOOT) supply is obtained through an internal Os-

cillator and few external components to realize a

charge pump circuit as shown in Figure 3. The oscil-

lator output (VCP) is a square wave at 600kHz (typi-

cal) with 10V amplitude. Recommended values/part

numbers for the charge pump circuit are shown in

Table1.

Table 1. Charge Pump External Components

Values

CBOOT

220nF

CP

10nF

RP

100Ω

D1

1N4148

D2

1N4148

Figure 3. Charge Pump Circuit

VS

D1

D2

CBOOT

RP

CP

VCP VBOOT

VSA VSB D01IN1328

LOGIC INPUTS

Pins IN1A, IN2B, IN1B and IN2B are TTL/CMOS and

uC compatible logic inputs. The internal structure is

shown in Fig. 4. Typical value for turn-on and turn-off

thresholds are respectively Vthon = 1.8V and Vthoff

= 1.3V.

Pins ENA and ENB have identical input structure with

the exception that the drains of the Overcurrent and

thermal protection MOSFETs (one for the Bridge A

and one for the Bridge B) are also connected to these

pins. Due to these connections some care needs to

be taken in driving these pins. The ENA and ENB in-

puts may be driven in one of two configurations as

shown in figures 5 or 6. If driven by an open drain

(collector) structure, a pull-up resistor REN and a ca-

pacitor CEN are connected as shown in Fig. 5. If the

driver is a standard Push-Pull structure the resistor

REN and the capacitor CEN are connected as shown

in Fig. 6. The resistor REN should be chosen in the

range from 2.2kΩ to 180KΩ. Recommended values

for REN and CEN are respectively 100KΩ and 5.6nF.

More information on selecting the values is found in

the Overcurrent Protection section.

Figure 4. Logic Inputs Internal Structure

5V

ESD

PROTECTION

D01IN1329

Figure 5. ENA and ENB Pins Open Collector

Driving

OPEN

COLLECTOR

OUTPUT

5V

REN

ENA or ENB

CEN

5V

D02IN1349

Figure 6. ENA and ENB Pins Push-Pull Driving

5V

PUSH-PULL

OUTPUT

REN ENA or ENB

CEN

D02IN1350

8/22

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