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L6258E View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
L6258E Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
IL
OA
D
RS
--1----
Rb
=
VDAC
--1----
Ra
L6258E
ILOAD
=
VDA C -R----a-R-----b-R-----s-
=
0.5
-V----D----A---C--
RS
(
A
)
where:
VDAC
is the control voltage defining the load current value
Gin
is the gain of the input transconductance amplifier ( 1/Ra )
Gs
is the gain of the sense transconductance amplifier ( 1/Rb )
Rs
is the resistor connected in series to the output to sense the load current
In this configuration the input voltage is compared with the feedback voltage coming from the sense resistor,
then the difference between this two signals is amplified by the error amplifier in order to have an error signal
controlling the duty cycle of the output stage keeping the load current under control.
It is clear that to have a good performance of the current control loop, the error amplifier must have an high DC
gain and a large bandwidth .
Gain and bandwidth must be chosen depending on many parameters of the application, like the characteristics
of the load, power supply etc..., and most important is the stability of the system that must always be guaran-
teed.
To have a very flexible system and to have the possibility to adapt the system to any application, the error am-
plifier must be compensated using an RC network connected between the output and the negative input of the
same.
For the evaluation of the stability of the system, we have to consider the open loop gain of the current control
loop:
Aloop = ACerr · ACpw · ACload · ACsense
where AC... is the gain of the blocks that refers to the error, power and sense amplifier plus the attenuation of
the load block.
The same formula in dB can be written in this way:
AloopdB = ACerrdB + ACpwdB + ACloaddB + ACsensedB
So now we can start to analyse the dynamic characteristics of each single block, with particular attention to the
error amplifier.
Power Amplifier
The power amplifier is not a linear amplifier, but is a circuit driving in PWM mode the output stage in full bridge
configuration.
The output duty cycle variation is given by the comparison between the voltage of the error amplifier and two
triangular wave references Tri_0 and Tri_180. Because all the current control loop is referred to the Vr refer-
ence, the result is that when the output voltage of the error amplifier is equal to the Vr voltage the two output
Out_A and Out_B have the same phase and duty cycle at 50%; increasing the output voltage of the error am-
plifier above the Vr voltage, the duty cycle of the Out_A increases and the duty cycle of the Out_B decreases
of the same percentage; on the contrary decreasing the voltage of the error amplifier below the Vr voltage, the
duty cycle of the Out_A decreases and the duty cycle of the Out_B increases of the same percentage.
The gain of this block is defined by the amplitude of the two triangular wave references; more precisely the gain
of the power amplifier block is a reversed proportion of the amplitude of the two references.
In fact a variation of the error amplifier output voltage produces a larger variation in duty cycle of the two outputs
11/20

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