Application informations
L5981
minimize the dc error on regulated output voltage; finally to place other poles far away the
zero dB frequency.
In Figure 10 the type III compensation network is shown. This network introduces two zeros
(fZ1, fZ2) and three poles (fP0, fP1, fP2). They expression are:
Equation 16
Equation 17
fZ1 = 2----π-----⋅---C-----3----⋅--1-(--R-----1----+-----R----3----),
fZ2 = 2----π-----⋅---R--1---4----⋅---C----4-
fP0 = 0,
fP1
=
--------------1--------------- ,
2π ⋅ R3 ⋅ C3
fP2
=
---------------------1----------------------
2π
⋅
R4
⋅
-C-----4----⋅---C-----5--
C4 + C5
Figure 10. Type III compensation network
In Figure 11 the Bode diagram of the PWM and LC filter transfer function (GPW0 · GLC(f))
and the open loop gain (GLOOP(f)=GPW0 · GLC(f) · GTYPEIII(f)) are drawn.
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