LA6571 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LA6571

5CH Driver for Mini Disk and Compact Disk

SANYO -> Panasonic 

LA6571

Electrical Characteristics at Ta = 25°C, VCC1 = 5V, VCC2 = 12V, VREF-IN = 1.65V, unless especially specified

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

[ALL Blocks]

No-load current drain ON

No-load current drain OFF

VREF input voltage range

Thermal shutdown temperature

ICC ON

ICC OFF

VREF-IN

TSD

All outputs ON *1

All outputs OFF *1

*7

30

50 mA

10

20 mA

1

VCC2-1

V

150

175

200

°C

[BTL AMP Block] (CH1 to CH5)

Output offset voltage

Output offset voltage

Output voltage

Output voltage

Closed-circuit voltage gain

Closed-circuit voltage gain

Slew rate

MUTE ON voltage

MUTE OFF voltage

VOFF

VOFF1

VO

VO1

VG1

VG3

SR

VMUTE ON

VMUTE OFF

Voltage difference in output between

BTL AMP and each channel.

Voltage difference in output between

BTL AMP and each channel.

CH1,CH2 *3

CH3,CH4,CH5 *4

Gain between input and output for CH1, CH2,

and CH5 *2

Gain between input and output for CH3 and

CH4 *2

AMP Independent.

Multiply 2 between outputs. *7

Each MUTE *6

Each MUTE *6

-50

50 mV

-80

3.2

4.0

9.7

10.5

4.2

5.0

80 mV

V

V

6.0 times

8.2

9.0

11.0 times

0.5

V/µs

2

V

0.5

V

[Input AMP Block]

Input voltage range

Output offset voltage

Output current (SINK)

VIN op

VOFF op

SINK op

0

VCC2-1.5

V

-10

10 mV

2

mA

Output current (SOURCE)

SOURCE op

*5

300

500

µA

[Power Supply Block] (PNP transistor: 2SB632K)

Regulator output

REG-IN SINK current

VOUT

REG-IN-SINK

For error Amp, RL = 10kΩ at buffer

Base current to external PNP

1.2

1.3

1.4

V

5

10

mA

Line regulation

∆VOLN

6V ≤ VCC ≤ 12V, IO = 200mA

20

150 mV

Load regulation

∆VOLD

5mA ≤ IO ≤ 200mA

50

200 mV

*1. Current dissipation that is a sum of VCC1 and VCC2 at no load.

*2. Input AMP is a BUFFER AMP.

*3. Voltage difference between both ends of load (8Ω). Output saturated.

*4. Voltage difference between both ends of load (12Ω). Output saturated.

*5. The source of input OP-AMP is a constant current. (See the specified block diagram.)

As the 11kΩ resistance to the next stage is a load, pay due attention when setting the input OP-AMP gain.

*6. Output ON with MUTE: [H] and OFF with MUTE: [L] (HI impedance).

*7. Design guarantee value

No.7739-2/7

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