LA75501 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LA75501

Monolithic Linear IC For Use in TV/VCR Applications VIF/SIF Signal Processing IC

SANYO -> Panasonic 

LA75501

V16. V17.V18 Maximum, minimum AFT voltage [V13H, V13L]

(1) Internal AGC

(2) fp = 38.0MHz ±1.5MHz Vi = 10mVrms (VIF input)

(3) Measure maximum and minimum AFT output voltage by changing the input frequency.

(4) Maximum voltage: V13H, minimum voltage: V13L.

AFT

output

(V)

V13H

V1 ; 4.0V

V2 ; 3.0V

fda ; AFT dead zone

f1 f2

V13L

IF frequency (MHz)

V19.V20.V21. AFT detector sensitivity, AFT Dead Zone, AFT tolerance [dfa, Sf, fda]

(1) Measure the frequency deviation when the voltage at the measuring point B changes from V1 to V2. ·····∆f

V1−V2

Sf (mV/kHz) = ∆f

(2) Measure the width in which the voltage at the measuring point B does not change.

(3) Calculate as follows:

fda (kHz) = f2 − f1

(4) Calculate as follows:

IF Center frequency: 38.9MHz, 38MHz

dfa (kHz) = fc−

f1 + f2

2

V23. V24. VIF input resistance, input capacitance [Ri, Ci]

(1) External AGC (V15 = 2V)

(2) Referring to the Input Impedance Test Circuit, measure Ri and Ci with an impedance analyzer.

V25.V26. APC pull-in range [fpu, fpl]

(1) Internal AGC

(2) fp = 33MHz to 44MHz CW;10mVrms

(3) Adjust the SG signal frequency to be higher than fp = 38.0MHz to bring the PLL to unlocked state.

Note; The PLL is taken as in unlocked state when a beat signal appears at test point A.

(4) When the SG signal frequency is lowered, the PLL is brought to locked state again. ····· f1

(5) Lower the SG signal frequency to bring the PLL to unlock state.

(6) When the SG signal frequency is raised, the PLL is brought to locked state again. ····· f2

(7) Calculate as follows:

fpu = f1 − 38.0MHz

fpl = f2 − 38.0MHz

V27.V28. VCO maximum variable range (U, L) [dfu, dfl]

(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).

(2) fl is taken as the frequency when 1V is applied to the APC pin (pin 7). In the same manner,

fu is taken as the frequency when 5V is applied to the APC pin (pin 7).

dpu = fu − 38.0MHz

dfl = fl − 38.0MHz

No.A0789-9/11

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