LA7567EV View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LA7567EV

TV and VCR VIF/SIF IF Signal-Processing Circuit with PAL/NTSC Multi-Format Audio Support

SANYO -> Panasonic 

LA7567EV

V15.V16. Differential gain, differential phase . . . [DG, DP]

(1) Internal AGC

(2) fp = 38.9MHz ALP50% 87.5% modulation video signal Vi = 10mVrms

(3) Measure the DG and DP at test point A

V17. No signal AFT voltage . . . . . . . . . . . . . . . . . [V13]

(1) Internal AGC

(2) Measure the DC voltage at the AFT output (B).

V18.V19.V20. Maximum minimum AFT output voltage, AFT detection sensitivity . . . . [V13H, V13L, Sf]

(1) Internal AGC

(2) fp = 38.9MHz ±1.5MHz Sweep = 10mVrms (VIF input)

(3) Maximum voltage: V13H, minimum voltage: V13L

(4) Measure the frequency deviation at which the voltage at test point B changes from V1 to V2.

..........∆f

2000(mV)

Sf =

mV/kHz

∆f (kHz)

AFT

output

(V)

V13H

∆f

V1 ; 3.5V

V2 ; 1.5V

V13L

IF frequency (MHz)

V21.V22. VIF input resistance, Input capacitance . . . . . . . . . . [Ri, Ci]

(1) Referring to the input impedance Test Circuit, measure Ri and Ci with an impedance analyzer.

V23.V24. APC pull-in range. . . . . . . . . . . . . . . . . . [fpu, fpl]

(1) Internal AGC

(2) fp = 33MHz to 44MHz continuous wave; 10mVrms

(3) Adjust the SG signal frequency to be higher than fp = 38.9MHz to bring the PLL to unlocked state.

Note: GThe PLL is assumed to be in unlocked state when a beat signal appears at test point A.

(4) When the SG signal frequency is lowered, the PLL is brought to locked state again. ...........(f1)

(5) Lower the SG signal frequency to bring the PLL to unlocked state.

(6) When the SG signal frequency is raised, the PLL is brought to locked state again. ...........(f2)

(7) Calculate as follows:

fpu = f1 - 38.9MHz

fpl = f2 - 38.9MHz

V25. AFT tolerance frequency . . . . . . . . . . . . . . . [∆Fa1]

(1) Internal AGC

(2) SG1:37.9MHz to 40.9MHz variable continuous wave 10mVrmns

(3) Adjust the SG1 signal frequency so that the AFT output DC voltage (test point B) becomes

2.5V; that SG1 signal frequency is f1.

(4) External AGC (Adjust the V17.)

(5) Apply 5V to the IFAGC (pin 17) and then pick up the VCO oscillation frequency from GND, etc. and measure

the frequency (f2)

(6) Calculate as follows:

AFT tolerance frequency ∆Fa1 = f2 - f1(kHz)

No.7779-8/21

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