LA70100M View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LA70100M Datasheet PDF : 16 Pages
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LA70100M
MODE control
[ Output mute control ]
Forcibly applying a DC voltage to pin-1 allows REC-OUT and PB-OUT muting control.
pin-1 voltage
output mode ( pin-12, pin-18 )
5V
OPEN
0V
Forced SECAM
AUTO ( internal detect ) SECAM : Active
Forced mute
Except SECAM : mute
[ TEST mode control ]
pin
pin-11
pin-12
pin-18
pin-20
pin-28
use monitor output
1.1MHz BELL/A-BELL (11 to GND:3.9k)
1.1MHz BPF (pin-9 : 5V)
4.3MHz BPF (pin-9 : 5V)
4.3MHz BELL/A-BELL (20 to GND:3.9k)
BGP out (pin-9 : 5V)
use monitor input
⎯
1.1MHz BELL/A-BELL input (4V BIAS+SIG)
4.3MHz BELL/A-BELL input (4V BIAS+SIG)
⎯
⎯
[ BGP position control ]
pin-4 add voltage
L (0V)
OPEN (2.5V)
H (5V)
[ REC / PB mode control ]
pin-17 add voltage
L (0V)
H (5V)
BGP position
-400ns
±0ns
+400ns
mode
REC mode
PB mode
[ 4.3M BELL offset control* ]
pin-10 add voltage
L (0V)
OPEN (2.5V)
H (5V)
*Active only in PB mode
offset frequency
+40kHz
±0kHz
+80kHz
Block diagram / application
C.SYNC IN SECAM HI
+
30
29
28
27
26
25
SYNC GATE GEN
/ V-SEP
BGP
GEN
MODE
CTL
to MUTE
SECAM
DET
to MUTE
to SYNC GATE
to PB AGC
to REC KILLER
CONTROL
LOGIC
AFC
4.43MHz
VCO
Buffer
Filter Adj.
1
2
3
4
5
6
+
MODE CTL
H:SECAM
M:AUTO DET
4.43MHz
L:EXCEPT SECAM CW
BGP DELAY CTL
+
H:+400n
M:0n
L:-400n
VCC VCC
5V
5V
PB OUT RP CTL REC IN
REC : 0V
+
PB : 5V
24
23
22
21
20
19
18
17
16
REC
/ PB
Buffer PB-H
PB
MUTE
BELL 4.3MHz
REC
BELL
ANTI BELL
ANTI BELL 2.2MHz
PB
TRAP
4.3MHz
BFP
REC
PB
SYNC
GATE
REC
X2
2.2MHz
BFP
X2
2.2MHz 4.3MHz
TRAP BFP
LIM
PB
CHROMA
1.1MHz
BELL
1.1MHz
BELL
PB ANTI BELL
1.1MHz
BFP
ANTI BELL
REC
REC SYNC
GATE
PB
2.2MH
z
1/4
REC AGC AGC
MUT AMP DET
Buffer
4.3MHz BELL
FO CTL
REG
4.0V
7
8
9 FO CTL 10
11
12
13
14
15
+
4.3MHz BELL FO CTL
H:+80k
M: 0k
L: +40k
* PB ONLY
REC-C OUT
PB-C IN
No.7204-11/16
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