LC651431L View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC651431L Datasheet PDF : 39 Pages
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LC651432N/F/L, 651431N/F/L
Electrical Characteristics at Ta = –40 to +85°C, VSS = 0 V, VDD = 3.0 to 6.0 V (unless otherwise specified)
Parameter
High-level input current
Low-level input current
High-level output voltage
Low-level output voltage
Symbol
IIH(1)
IIH(2)
IIH(3)
IIL(1)
IIL(2)
IIL(3)
IIL(4)
VOH(1)
VOH(2)
VOL(1)
VOL(2)
Conditions
• With the output n-channel
transistors off
(Including the n-channel
transistor off leakage
current.)
• VIN = 13.5 V
• With the output n-channel
transistors off
(Including the n-channel
transistor off leakage
current.)
• VIN = VDD
• External clock mode
• VIN = VDD
• With the output n-channel
transistors off
• VIN = VSS
• With the output n-channel
transistors off
• VIN = VSS
VIN = VSS
• External clock mode
• VIN = VSS
• IOH = –50 µA
• VDD =4.0 to 6.0 V
• IOH = –10 µA
• IOL = 10 mA
• VDD = 4.0 to 6.0 V
IOL = 1 mA, when IOL for
all ports is less than or
equal to 1 mA.
Applicable pins
min
Open-drain specification ports
(except I0)
The I0 port with open-drain
specifications
OSC1
Open-drain specification ports
–1.0
Built-in pull-up resistor
specification ports
–1.3
RES
OSC1
Built-in pull-up resistor
specification ports
Built-in pull-up resistor
specification ports
Ports
–45
–1.0
VDD – 1.2
VDD – 0.5
Ports
Ratings
typ
–0.35
–10
Unit
max
5.0
µA
1.0
µA
1.0
µA
µA
mA
µA
µA
V
V
1.5
V
0.5
V
Hysteresis voltage
VHIS
High-level threshold voltage
VtH
RES, INT, SCK, SI, and
OSC1 with Schmitt trigger
specifications*5
Low-level threshold voltage
VtL
Current drain*6
Two-pin RC oscillator
Ceramic oscillator
External clock
Standby mode
IDDOP(1)
IDDOP(2)
IDDOP(3)
IDDOP(4)
IDDOP(5)
IDDOP(6)
IDDOP(7)
IDDst
• While operating, with the
output n-channel
transistors off
VDD
• Port voltage = VDD
• Figure 2, fosc = 800 kHz
(typical)
See figure 2.
fosc = 400 kHz (typical)
VDD
• Figure 3, 4 MHz, divide-
by-three circuit used.
VDD
• Figure 3, 4 MHz, divide-
by-four circuit used.
VDD
See figure 3. 400 kHz
VDD
See figure 3. 800 kHz
VDD
• 200 to 1444 kHz, no divider
• 600 to 4330 kHz, divide-
by-three circuit used
VDD
• 800 to 4330 kHz, divide-
by-four circuit used
Output n-channel
VDD
transistors off, VDD = 6 V
Port voltage = VDD,
VDD
VDD = 3 V
0.1 VDD
V
0.4 VDD
0.8 VDD
V
0.2 VDD
0.6 VDD
V
1
3 mA
0.8
2.5 mA
1
3 mA
1
3 mA
1
2.5 mA
1
3 mA
1
4 mA
0.05
0.025
10
µA
5
µA
Continued on next page.
No. 6498-14/39
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