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LC651431N View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LC651431N Datasheet PDF : 39 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC651432N/F/L, 651431N/F/L
Continued from preceding page.
Count
Pin
I/O
Function
Options
Reset state
Handling when
unused
4 PE0 to PE3 I/O • I/O port E0 to 3
1. Open-drain output
• High-level
The same as
Input in 4-bit units (IP instruction)
2. Built-in pull-up resistor
output (with that for
Output in 4-bit units (OP instruction)
Options 1 and 2 may be specified the output n- PA0 to 3.
Set/reset in single-bit units (SPB and RPB
in bit units.
channel
instructions)
transistor off)
Test in single-bit units (BP and BNP instructions)
• PE0 also has a continuous pulse (64Tcyc)
output function.
4
PF0/SI
I/O • I/O port F0 to 3
The same as those for PE0 to 3.
The same as The same as
PF1/SO
Functions and options identical to PE0 to 3.
that for PE0 to 3. that for
PF2/SCK
(See note.)
The serial port PA0 to 3.
PF3/INT
• PF0 to 3 have shared functions as the serial
is disabled and
interface pins and the INT input.
INT is the
Either function can be selected under program
interrupt source.
control.
SI ... Serial input port
SO ... Serial output port
SCK ... Serial clock input or output
INT ... Interrupt request input
Serial input/output is switched between 4-bit
and 8-bit units under program control.
Note: This port does not have a continuous
pulse output function.
4 PG0 to PG3 I/O • I/O port G0 to 3
Functions and options identical to PE0 to 3.
(See note.)
Note: This port does not have a continuous
pulse output function.
The same as those for PE0 to 3.
The same as
those for
PE0 to 3.
The same as
that for
PA0 to 3.
1 PI0/OSC2 I/O • I/O port IO
Output Functions and options identical to PG0 to 3.
• However, consists of a single bit.
• When a 2-pins oscillator is used, this pin
functions as the OSC2 pin, and the I/O port
function is not available.
The same as those for PG0 to 3.
The same as
those for
PG0 to 3.
The same as
that for
PA0 to 3.
1
RES
Input • System reset input
• Connect an external capacitor to implement a
power-on reset.
• The reset start operation requires that a low
level be held for at least 4 clock cycles.
1
TEST Input • IC test pin
This pin must be connected to VSS during
normal operation.
This pin must
be connected to
VSS.
No. 6498-8/39

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