LC723482W View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC723482W Datasheet PDF : 15 Pages
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Pin Functions
Pin No.
Pin
I/O
LC723481W/2W/3W
Function
64
XIN
I
75 kHz oscillator connections
1
XOUT
O
I/O circuit
63
TEST1
2
TEST2
6
PA0
5
PA1
4
PA2
3
PA3
I
IC testing. These pins must be connected to ground during normal operation.
I
Special-purpose key return signal input ports designed with a low threshold voltage.
When used in conjunction with port PB to form a key matrix, up to 3 simultaneous key
I
presses can be detected. The four pull-down resistors are selected together in a
single operation using the IOS instruction (PWn = 2, b1); they cannot be specified
individually. Input is disabled in backup mode, and the pull-down resistors are
disabled after a reset.
—
Input with built-in
pull-down resistor
General-purpose CMOS and n-channel open-drain output shared-function ports.
Unbalanced CMOS push-pull
The IOS instruction (Pwn = 2) is used for function switching.
10
PB0
(b0: PB0, b2: PB1, b3: PB2, PB3) (0: general-purpose CMOS, 1: n-channel open-
drain)
9
PB1
Special-purpose key source signal output ports. Since unbalanced CMOS output
8
PB2
O transistor circuits are used, diodes to prevent short-circuits when multiple keys are
pressed are not required. These ports go to the output high-impedance state in
7
PB3
backup mode. These ports go to the output high-impedance state after a reset and
remain in that state until an output instruction (OUT, SPB, or RPB) is executed.
*: Verify the output impedance conditions carefully if these pins are used for functions
other than key source outputs.
14
PC0
13
PC1
General-purpose I/O ports.
12
PC2
PD0 can be used as an external interrupt port. Input or output mode can be set
11
PC3
I/O individually using the IOS instruction (Pwn = 4, 5) by the bit . A value of 0 specifies
18
INT0/PD0
17
PD1
input, and 1 specifies output. These ports go to the input disabled high-impedance
state in backup mode. They are set to function as general-purpose input ports after a
reset.
16
PD2
15
PD3 *2
CMOS push-pull
General-purpose output and BEEP output (PE0 shared function ports).
The BEEP instruction is used to switch the BEEP/PE0 port between the general-
purpose output port and the BEEP output functions.
N-channel open-drain
A BEEP instruction with b2 = 0 will set the BEEP/PE0 port to function as a general-
purpose output port. If b2 is set to 1, the instruction will select the BEEP output
function. Bits b0 and b1 switch the frequency of the BEEP output. This IC supports
two BEEP frequencies.
20
BEEP/PE0
O
*: When the PE0 port is set to function as the BEEP output, executing an output
19
PE1
instruction for PE0 will only change the value of the internal output latch; it will have
no effect on the output. Only the PE0 pin can be switched between the general-
purpose output port and BEEP output functions; the PE1 pin is a dedicated general-
purpose output port. In backup mode, these ports go to the high-impedance state.
These ports will remain in that state until either an output instruction or a BEEP
instruction is executed. Since these ports are open drain ports, a resistor must be
inserted between each port and VDD. At reset, they are set to the general-purpose
output port function.
Continued on next page.
No. 7253-7/15
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