LC72709 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LC72709

FM Multiplex Reception IC for Mobile Systems

SANYO -> Panasonic 

LC72709E, 72709W

Continued from preceding page.

definition, the protection counts for both the forward and backward directions will be set to 1. However, from an

operation standpoint, this corresponds to operation equivalent to there being no protection circuit. The default values are

a forward protection count of 8 and a backward protection count of 2. We recommend resetting the block synchronization

backward protection count to a value stricter than the default, e.g. to a value of 3 or more as opposed to the default of 2, if

the block synchronization recognition output (the BLOCK pin, pin 23) is used to recognize the presence or absence of

FM multiplex data.

• Frame Synchronization Error Protection Count

This IC detects the four unique BIC inflection points that exist in a single frame, and increments or decrements the

protection counter depending on whether or not the IC internal frame synchronization counter matches. The data values

are set in the same way as those for the block synchronization protection count are set, namely data in which 1 has been

subtracted from the desired protection count must be transferred. The frame synchronization default values are 8 for

forward protection and 2 for backward protection.

• Control Registers

These registers are used to set the IC operating mode. These are described later.

• Notes

— The address bits DI12 to DI15 are ignored.

— Addresses other than those listed above (for example location 0110) are special addresses used for test mode and

other special IC functions. Do not set these locations.

— The default values are the values reloaded into the internal registers when a reset signal (RST) is received. These

values are the recommended values for normal operation, and normally do not need to be modified. If only the

default values are used, there is no need to provide data transfer routines in the external CPU.

Received data

Synchronization

counter BIC position

Block

: Both forward and backward protection counts are 3.

Figure 1 Block Synchronization Protection Operation

(forward → backward → forward)

Layer 4 CRC Check Circuit

This is a function provided for data group error detection, i.e. layer 4 CRC. After the stipulated number of bytes of data

group data and a 16-bit CRC error check word are transferred, the CRC4 pin outputs a high level if there were no errors.

The CRC4 pin outputs a high level if all the bits in the IC internal CRC check register were 0. When using this function

to perform the layer 4 CRC check, the IC internal CRC check register must be initialized before a single data group data

unit is transferred. This register is initialized by sending bit 7 of the control register. Note that since this flag is not

automatically reset to 0, the application must return it to 0 before transferring layer 4 CRC check data. If there were no

errors in any of the received data groups, the CRC register will always be all zeros after the CRC check of a single data

group. Therefore, the above control register initialization will not be necessary as long as there are no errors in the layer 4

CRC. The data length of the transferred data group data is in unit of 8 bits. Also note that while there is no upper limit on

the amount of data transferred in a single operation, data transfers can also be divided into multiple transfer operations.

No. 5876-7/16

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