LC7861KE View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC7861KE Datasheet PDF : 18 Pages
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LC7861KE
3. 1/2 VCO; Pin 18: PCK
PCK is a monitor pin that outputs an average frequency of 4.3218 MHz, which is the VCO frequency divided by two.
4. Synchronization detection monitor; Pin 19: FSEQ
Pin 19 goes high when the frame synchronization (a positive polarity synchronization signal) from the EFM signal
read in by PCK and the timing generated by the counter (the interpolation synchronization signal) agree. This pin is a
synchronization detection monitor. (It is held high for a single frame.)
5. CLV servo circuit; Pin 10: CLV+, pin 11: CLV–, pin 12: V/P
MSB
LSB
00000100
00000101
00000110
00000111
Command
DISC MOTOR START (accelerate)
DISC MOTOR CLV (CLV)
DISC MOTOR BRAKE (decelerate)
DISC MOTOR STOP (stop)
RES = low
o
The CLV+ pin provides the signal that accelerates the disk in the forward direction and the CLV– pin provides the
signal that decelerates the disk. Commands from the control microprocessor select one of four modes; accelerate,
decelerate, CLV and stop. The table below lists the CLV+ and CLV– outputs in each of these modes.
Mode
Accelerate
Decelerate
CLV
Stop
CLV+
High
Low
*
Low
CLV–
Low
High
*
Low
Note: *In CLV mode the LC7861KE detects the disk speed from the HF signal and provides proper linear speed
using several different control schemes by switching the DSP internal modes. The PWM period is 7.35 kHz,
the 1/64 duty period is 1.114s, and V/P outputs a high level during rough servo and a low level during phase
control.
Internal mode
Rough servo (velocity too low)
Rough servo (velocity too high)
Phase control (PCK locked)
Low speed (no HF signal)
CLV+
High
Low
PWM
1/64 duty
CLV–
Low
High
PWM
Low
V/P
High
High
Low
High
Note: After a CLV servo control command, the TOFF pin will be at the low level only for CLV mode, and will be
high for all other modes. Controlling the TOFF pin by microprocessor command is only possible in CLV mode.
No. 4818-7/18
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