Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits
English
한국어
日本語
русский
简体中文
español
Part Name
Description
LC875024A View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC875024A
8-Bit Single Chip Microcontroller with 32/24/16K-Byte EPROM and 640-Byte RAM On Chip
SANYO -> Panasonic
LC875024A Datasheet PDF : 25 Pages
First
Prev
11
12
13
14
15
16
17
18
19
20
Next
Last
LC875032A/24A/16A
4. Serial Input/Output Characteristics at Ta=-30
°
C to +70
°
C, VSS1=VSS2=VSS3=0V
Parameter
Cycle
Symbol
t
SCK
(1)
Pins
SCK0(P12)
Conditions
Refer to figure 6
VDD[V]
Ratings
min. typ. max.
unit
2.5 - 6.0 2
t
CYC
Low level t
SCKL
(1)
1
pulse width
t
SCKLA
(1)
1
High level
pulse width
Cycle
t
SCKH
(1)
t
SCKHA
(1)
t
SCK
(2)
SCK1(P15)
Refer to figure 6
1
3(SIO0)
2.5 - 6.0 2
Low level t
SCKL
(2)
1
pulse width
High level t
SCKH
(2)
1
pulse width
Cycle
t
SCK
(3) SCK0(P12) •Use pull-up resistor 2.5 - 6.0 4/3
(1k
Ω
) when output
Low level t
SCKL
(3)
is open drain.
pulse width
•Refer to figure 6
t
SCKLA
(2)
SCK0(P12)
SIO0
High level t
SCKH
(3)
pulse width
t
SCKHA
(2)
SCK0(P12)
SIO0
Cycle
t
SCK
(4) SCK1(P15) •CMOS output option 2.5 - 6.0 2
•Refer to figure 6
Low level t
SCKL
(4)
pulse width
High level t
SCKH
(4)
pulse width
Data set-up tsDI
SB0(P11), •Data set-up to
4.5 - 6.0 0.03
time
SB1(P14),
SI0CLK
SI0,
•Refer to figure 6
2.5 - 6.0
Data hold
thDI
SI1
4.5 - 6.0 0.03
time
2.5 - 6.0
Output delay tdD0
time
SO0(P10),
SO1(P13),
SB0(O11),
SB1(P14)
•Data set-up to
SI0CLK
•When port is open
drain: Time delay
from SI0CLK trailing
edge to the SO data
change.
•Refer to figure 6
4.5 - 6.0
2.5 - 6.0
1/2
tSCK
3/4
1/2
2
t
CYC
1/2
tSCK
1/2
µ
s
1/3tCYC
+0.05
No.6713-15/25
Share Link:
datasheetq.com [
Privacy Policy
]
[
Request Datasheet
] [
Contact Us
]