LH28F008SCT-12 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

Manufacturer

LH28F008SCT-12

Flash Memory 8M (1M ×8)

Sharp Electronics 

LHF08CH3

4

Individual block locking uses a combination of bits,

sixteen block lock-bits and a master lock-bit, to lock

and unlock blocks. Block lock-bits gate block erase

and byte write operations, while the master lock-bit

Jates block lock-bit modification.

Lock-bit

zonfiguration operations (Set Block Lock-Bit, Set

Master Lock-Bit, and Clear Block Lock-Bits

zommands) set and cleared lock-bits.

The status register indicates when the WSM’s block

erase, byte write, or lock-bit configuration operation is

iinished.

The RY/BY# output gives an additional indicator of

JVSM activity by providing both a hardware signal of

status (versus software polling) and status masking

iinterrupt masking for background block erase, for

mample). Status polling using RY/BY# minimizes

30th CPU overhead and system power consumption.

JVhen low, RY/BY# indicates that the WSM is

3erforming a block erase, byte write, or lock-bit

zonfiguration. RY/BY#-high indicates that the WSM is

,eady for a new command, block erase is suspended

:and byte write is inactive), byte write is suspended,

3r the device is in deep power-down mode.

The access time is 120 ns (tAvav) over the

commercial temperature range (0% to +70”(Z) ant

Vc, supply voltage range of 4.5V-5.5V. At lower Vcc

voltages, the access times are 150 ns (3.OV-3.6V:

and 170 ns (2.7V-3.6V).

The Automatic Power Savings (APS) feature

substantially reduces active current when the device

is in static mode (addresses not switching). In APS

mode, the typical I,,, current is 1 mA at 5V V,,.

When CE# and RP# pins are at V,,, the I,, CMOS

standby mode is enabled. When the RP# pin is a

GND, deep power-down mode is enabled which

minimizes power consumption and provides write

protection during reset. A reset time (tpHQv) is

required from RP# switching high until outputs arc

valid. Likewise, the device has a wake time (t,,,,:

from RP#-high until writes to the CUI are recognized

With RP# at GND, the WSM is reset and the status

register is cleared.

The device is available in 40-lead TSOP (Thin Smal

Outline Package, 1.2 mm thick). Pinout is shown ir

Figure 2.

Rev.1.0

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