LH28F008SCL-12 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

Manufacturer

LH28F008SCL-12

Flash Memory 8M (1M ×8)

Sharp Electronics 

LHF08CH3

3

1 INTRODUCTION

This datasheet

contains

LH28F008SCT-L12

specifications. Section 1 provides a flash memory

overview. Sections 2, 3, 4, and 5 describe the

memory organization and functionality. Section 6

covers electrical specifications. LH28F008SCT-L12

Flash memory documentation

also includes

application notes and design tools which are

referenced in Section 7.

1.1 New Features

The LH28F008SCT-L12 SmartVoltage Flash memory

maintains backwards-compatibility

with SHARP’s

28F008SA. Key enhancements over the 28F008SA

include:

*SmartVoltage Technology

*Enhanced Suspend Capabilities

&r-System Block Locking

Both devices share a compatible pinout, status

register, and software command set. These

similarities enable a clean upgrade from the

28F008SA to LH28F008SCT-L12. When upgrading, it

is important to note the following differences:

*Because of new feature support, the two devices

have different device codes. This allows for

software optimization.

l VPPLK has been lowered from 6.5V to l.5V to

support 3.3V and 5V block erase, byte write, and

lock-bit configuration operations. The V,, voltage

transitions to GND is recommended for designs

that switch V,, off during read operation.

*To take advantage of SmartVoltage technology,

allow V,, connection to 3.3V or 5V.

1.2 Product Overview

The LH28F008SCT-L12 is a high-performance 8M-bit

SmartVoltage Flash memory organized as 1 M-byte of

3 bits. The IM-byte of data is arranged in sixteen

SK-byte blocks which are individually erasable,

ockable, and unlockable in-system. The memory

nap is shown in Figure 3.

SmartVoltage technology provides a choice of Voc

and V,, combinations, as shown in Table 1, to mee

system performance and power expectations. 2.7\

V,, consumes approximately one-fifth the power o

5V Vo,. But, 5V Vco provides the highest reac

performance. V,, at 3.3V and 5V eliminates the neec

for a separate 12V converter, while V,,=12\

maximizes block erase and byte write performance

In addition to flexible erase and program voltages

the dedicated V,, pin gives complete data protectior

when V,+V,,,,.

Table 1. Vc, and V,, Voltage Combinations

Offered by SmartVoltage Technology

Vr.r: Voltage

-2..7V(‘)

Vpp Voltage

-

3.3v

3.3v, 54, l2V

5V

I

NOTE:

5v. 12v

1. Block erase, byte write and lock-bit configuratior

operations with V,o<3.OV are not supported.

Internal VCC and VP, detection Circuitb

automatically configures the device for optimizec

read and write operations.

A Command User Interface (CUI) serves as the

interface between the system processor and interna

operation of the device. A valid command sequence

written to the CUI initiates device automation. An

internal Write State Machine (WSM) automatically

executes the algorithms and timings necessary for

block erase, byte write, and lock-bit configuration

operations.

A block erase operation erases one of the device’s

64K-byte blocks typically within 0.3s (5V V,,, 12V

VP,) independent of other blocks. Each block can be

independently erased 100,000 times (1.6 million

block erases per device). Block erase suspend mode

allows system software to suspend block erase to

read or write data from any other block.

Writing memory data is performed in byte increments

typically within 6u.s (5V Vcc, 12V Vpp). Byte write

suspend mode enables the system to read data or

execute code from any other flash memory array

location.

Rev. 1.3

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