LH28F640SP View Datasheet(PDF) - Sharp Electronics
Part Name
Description
Manufacturer
LH28F640SP Datasheet PDF : 45 Pages
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LHF64P01
19
DC Characteristics (Continued)
VCC=2.7V-3.6V
Symbol
Parameter
Notes Min. Typ. Max. Unit
Test Conditions
1, 2, 6
ICCE
VCC Block Erase, Clear Block Lock
Bits Current
1, 2, 6
CMOS Inputs,
35
70
mA VPEN=VPENH
TTL Inputs,
40
80
mA VPEN=VPENH
ICCWS VCC (Page Buffer) Program or
ICCES Block Erase Suspend Current
1, 3
10
mA
Device is disabled
(refer to Table 2).
VIL
Input Low Voltage
6 -0.5
0.8
V
VIH
Input High Voltage
6
2.0
VCCQ
V
+ 0.5
VOL
Output Low Voltage
6, 8
VCC=VCCMin.,
0.4
V VCCQ=VCCQMin.,
IOL=2mA
VCC=VCCMin.,
0.2
V VCCQ=VCCQMin.,
IOL=100µA
VOH Output High Voltage
0.85×
VCCQ
6, 8
VCCQ
-0.2
VCC=VCCMin.,
V VCCQ=VCCQMin.,
IOH=-1.5mA
VCC=VCCMin.,
V VCCQ=VCCQMin.,
IOH=-100µ A
VPENLK
VPEN Lockout Voltage during Normal
Operations
4, 6, 7
1.0
V
VPEN Voltage during Block Erase,
VPENH
(Page Buffer) Program, Set Block Lock 4, 7
Bit, Clear Block Lock Bits or OTP
2.7
3.0
3.6
V
Program Operations
VLKO VCC Lockout Voltage
4
2.0
V
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values are the reference values at VCC=3.0V, VCCQ=3.0V and
TA=+25°C unless VCC is specified.
2. CMOS inputs are either VCCQ±0.2V or GND±0.2V. TTL inputs are either VIL or VIH.
3. ICCWS and ICCES are specified with the device de-selected. If read or (page buffer) program is executed while in block
erase suspend mode, the device’s current draw is the sum of ICCES and ICCR or ICCW. If read is executed while in (page
buffer) program suspend mode, the device’s current draw is the sum of ICCWS and ICCR.
4. Block erase, (page buffer) program, block lock configuration and OTP program operations are inhibited when
VPEN≤VPENLK or VCC≤VLKO. These operations are not guaranteed outside the specified voltage (VCC=2.7V-3.6V and
VPEN=2.7V-3.6V).
5. The Automatic Power Savings (APS) feature automatically places the device in power save mode after read cycle
completion. Standard address access timings (tAVQV) provide new data when addresses are changed.
6. Sampled, not 100% tested.
7. VPEN is not used for power supply pin. With VPEN≤VPENLK, block erase, (page buffer) program, block lock configuration
and OTP program operations are inhibited.
8. Includes STS.
Rev. 0.06
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