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LH28F320BFHE-PBTLZ2 View Datasheet(PDF) - Sharp Electronics

Part Name
Description
Manufacturer
LH28F320BFHE-PBTLZ2
Sharp
Sharp Electronics Sharp
LH28F320BFHE-PBTLZ2 Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LHF32FD2
4
Symbol
A0-A20
DQ0-DQ15
CE#
RST#
OE#
WE#
WP#
VPP
VCC
VCCQ
GND
NC
Type
INPUT
INPUT/
OUTPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
SUPPLY
SUPPLY
SUPPLY
Table 1. Pin Descriptions
Name and Function
ADDRESS INPUTS: Inputs for addresses. 32M: A0-A20
DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User
Interface) write cycles, outputs data during memory array, status register, query code,
identifier code and partition configuration register code reads. Data pins float to high-
impedance (High Z) when the chip or outputs are deselected. Data is internally latched
during an erase or program cycle.
CHIP ENABLE: Activates the devices control logic, input buffers, decoders and sense
amplifiers. CE#-high (VIH) deselects the device and reduces power consumption to
standby levels.
RESET: When low (VIL), RST# resets internal automation and inhibits write operations
which provides data protection. RST#-high (VIH) enables normal operation. After
power-up or reset mode, the device is automatically set to read array mode. RST# must
be low during power-up/down.
OUTPUT ENABLE: Gates the devices outputs during a read cycle.
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are
latched on the rising edge of CE# or WE# (whichever goes high first).
WRITE PROTECT: When WP# is VIL, locked-down blocks cannot be unlocked. Erase
or program operation can be executed to the blocks which are not locked and not locked-
down. When WP# is VIH, lock-down is disabled.
MONITORING POWER SUPPLY VOLTAGE: VPP is not used for power supply pin.
With VPPVPPLK, block erase, full chip erase, (page buffer) program or OTP program
cannot be executed and should not be attempted.
Applying 12V±0.3V to VPP provides fast erasing or fast programming mode. In this
mode, VPP is power supply pin. Applying 12V±0.3V to VPP during erase/program can
only be done for a maximum of 1,000 cycles on each block. VPP may be connected to
12V±0.3V for a total of 80 hours maximum. Use of this pin at 12V beyond these limits
may reduce block cycling capability or cause permanent damage.
DEVICE POWER SUPPLY (2.7V-3.6V): With VCCVLKO, all write attempts to the
flash memory are inhibited. Device operations at invalid VCC voltage (see DC
Characteristics) produce spurious results and should not be attempted.
INPUT/OUTPUT POWER SUPPLY (2.7V-3.6V): Power supply for all input/output
pins.
GROUND: Do not float any ground pins.
NO CONNECT: Lead is not internally connected; it may be driven or floated.
Rev. 2.44

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