LPC2114 View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

LPC2114

Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP Flash with 10-bit ADC

Philips Electronics 

Philips Semiconductors

LPC2114/LPC2124

Single-chip 16/32-bit microcontrollers

Table 3:

Symbol

P0.28

Pin description…continued

Pin

Type

13

I

I

O

P0.29

14

I

I

O

P0.30

15

I

I

I

P1.0 to P1.31

I/O

P1.16

16

O

P1.17

12

O

P1.18

8

O

P1.19

4

O

P1.20

48

O

P1.21

44

O

P1.22

40

O

P1.23

36

O

P1.24

32

O

P1.25

28

I

P1.26

24

I/O

P1.27

64

O

P1.28

60

I

P1.29

56

I

P1.30

52

I

P1.31

20

I

NC

10

RESET

57

I

XTAL1

62

I

9397 750 13145

Product data

Description

AIN1 — A/D converter, input 1. This analog input is always connected to its

pin.

CAP0.2 — Capture input for Timer 0, channel 2.

MAT0.2 — Match output for Timer 0, channel 2.

AIN2 — A/D converter, input 2. This analog input is always connected to its

pin.

CAP0.3 — Capture input for Timer 0, Channel 3.

MAT0.3 — Match output for Timer 0, channel 3.

AIN3 — A/D converter, input 3. This analog input is always connected to its

pin.

EINT3 — External interrupt 3 input.

CAP0.0 — Capture input for Timer 0, channel 0.

Port 1: Port 1 is a 32-bit bi-directional I/O port with individual direction

controls for each bit. The operation of port 1 pins depends upon the pin

function selected via the Pin Connect Block. Pins 0 through 15 of port 1 are

not available.

TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.

TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up.

TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up.

TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up.

TRACESYNC — Trace Synchronization. Standard I/O port with internal

pull-up.

Note: LOW on this pin while RESET is LOW, enables pins P1.25:16 to

operate as Trace port after reset.

PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.

PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.

PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.

TRACECLK — Trace Clock. Standard I/O port with internal pull-up.

EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.

RTCK — Returned Test Clock output. Extra signal added to the JTAG port.

Assists debugger synchronization when processor frequency varies.

Bi-directional pin with internal pull-up.

Note: LOW on this pin while RESET is LOW, enables pins P1.31:26 to

operate as Debug port after reset.

TDO — Test Data out for JTAG interface.

TDI — Test Data in for JTAG interface.

TCK — Test Clock for JTAG interface.

TMS — Test Mode Select for JTAG interface.

TRST — Test Reset for JTAG interface.

NC — Pin not connected.

External Reset input: A LOW on this pin resets the device, causing I/O ports

and peripherals to take on their default states, and processor execution to

begin at address 0. TTL with hysteresis, 5 V tolerant.

Input to the oscillator circuit and internal clock generator circuits.

Rev. 03 — 22 December 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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