LT3480IDD-PBF View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LT3480IDD-PBF

36V, 2A, 2.4MHz Step-Down Switching Regulator with 70µA Quiescent Current

Linear Technology 

TYPICAL PERFORMANCE CHARACTERISTICS

LT3480

Switching Waveforms; Transition

from Burst Mode to Full Frequency

VSW

5V/DIV

Switching Waveforms; Full

Frequency Continuous Operation

VSW

5V/DIV

IL

0.2A/DIV

IL

0.5A/DIV

VOUT

10mV/DIV

1µs/DIV

VIN = 12V; FRONT PAGE APPLICATION

ILOAD = 110mA

3480 G25

VOUT

10mV/DIV

1µs/DIV

VIN = 12V; FRONT PAGE APPLICATION

ILOAD = 1A

3480 G26

PIN FUNCTIONS

BD (Pin 1): This pin connects to the anode of the boost

Schottky diode. BD also supplies current to the internal

regulator. BD must be locally bypassed when not tied to

VOUT with a low ESR capacitor (1µF).

BOOST (Pin 2): This pin is used to provide a drive

voltage, higher than the input voltage, to the internal bipolar

NPN power switch.

SW (Pin 3): The SW pin is the output of the internal power

switch. Connect this pin to the inductor, catch diode and

boost capacitor.

VIN (Pin 4): The VIN pin supplies current to the LT3480’s

internal regulator and to the internal power switch. This

pin must be locally bypassed.

RUN/SS (Pin 5): The RUN/SS pin is used to put the

LT3480 in shutdown mode. Tie to ground to shut down

the LT3480. Tie to 2.5V or more for normal operation. If

the shutdown feature is not used, tie this pin to the VIN

pin. RUN/SS also provides a soft-start function; see the

Applications Information section.

SYNC (Pin 6): This is the external clock synchronization

input. Ground this pin for low ripple Burst Mode operation at

low output loads. Tie to a clock source for synchronization.

Clock edges should have rise and fall times faster than 1µs.

See synchronizing section in Applications Information.

PG (Pin 7): The PG pin is the open collector output of an

internal comparator. PG remains low until the FB pin is

within 14% of the final regulation voltage. PG output is

valid when VIN is above 3.6V and RUN/SS is high.

FB (Pin 8): The LT3480 regulates the FB pin to 0.790V.

Connect the feedback resistor divider tap to this pin.

VC (Pin 9): The VC pin is the output of the internal error

amplifier. The voltage on this pin controls the peak switch

current. Tie an RC network from this pin to ground to

compensate the control loop.

RT (Pin 10): Oscillator Resistor Input. Connecting a resistor

to ground from this pin sets the switching frequency.

Exposed Pad (Pin 11): Ground. The exposed pad must

be soldered to PCB.

For more information www.linear.com/LT3480

3480fe

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