LT3581
APPENDIX
From Figure 16, the DC gain, poles and zeros can be
calculated as follows:
DC Gain:
(Breaking loop at FB pin)
ADC
=
AOL(0) =
∂VC
∂VFB
•
∂IVIN
∂VC
•
∂VOUT
∂IVIN
•
∂VFB
∂VOUT
=
( ) gma •RO
•
gmp
•
η•
VIN
VOUT
•
RL
2
•
0.5R2
R1 + 0.5R2
Output Pole: P1=
2
2• π•RL •COUT
Error
Amp
Pole :
P2
=
2•
π•
1
RO +RC
• CC
Error
Amp
Zero :
Z1=
2•
1
π • RC
•CC
ESR Zero: Z2 =
1
2• π•RESR •COUT
RHP
Zero :
Z3
=
VIN2 •RL
2• π• VOUT2
•L
High
Frequency
Pole
:
P3
>
fS
3
Phase Lead Zero: Z4 =
1
2• π•R1•CPL
Phase Lead Pole: P4 =
1
R1• R2
2•
π
•
R1+
2
R2
2
•
CPL
Error Amp Filter Pole:
P5
=
2• π•
1
RC •RO
RC +RO
•CF
, CF
<
CC
10
The current mode zero (Z3) is a right half plane zero which
can be an issue in feedback control design, but is manage-
able with proper external component selection.
Using the circuit in Figure 18 as an example, Table 8 shows
the parameters used to generate the Bode plot shown in
Figure 17.
Table 8. Bode Plot Parameters
PARAMETER VALUE
UNITS
COMMENT
RL
14.5
Ω
Application Specific
COUT
9.4
µF
Application Specific
RESR
1
mΩ
Application Specific
RO
305
kΩ
Not Adjustable
CC
1000
pF
Adjustable
CF
56
pF
Optional/Adjustable
CPL
0
pF
Optional/Adjustable
RC
10.5
kΩ
Adjustable
R1
130
kΩ
Adjustable
R2
14.6
kΩ
Not Adjustable
VREF
1.215
V
Not Adjustable
VOUT
12
V
Application Specific
VIN
5
V
Application Specific
gma
270
µmho
Not Adjustable
gmp
15.1
mho
Not Adjustable
L
1.5
µH
Application Specific
fOSC
2
MHz
Adjustable
From Figure 17, the phase is –130° when the gain reaches
0dB giving a phase margin of 50°. The crossover frequency
is 17kHz, which is more than three times lower than the
frequency of the RHP zero Z3 to achieve adequate phase
margin.
170
150
130
110
90
70
50
30
10
–10
–30
10
0
–40
PHASE
–80
–120
–160
–180
–200
GAIN
–240
–280
–320
–360
100
1k
10k 100k 1M
FREQUENCY (Hz)
3851 F17
Figure 17. Bode Plot for Example Boost Converter
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27