DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LTC1040MJ View Datasheet(PDF) - Linear Technology

Part Name
Description
Manufacturer
LTC1040MJ
Linear
Linear Technology Linear
LTC1040MJ Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC1040
APPLICATIO S I FOR ATIO
Offset Voltage Error
The errors due to offset, common mode, power supply
variation, gain and temperature are all included in the
offset voltage specification. This makes it easy to compute
the error when using the LTC1040.
Example: error computation for Figure 4.
Assume: 2.8V VS 6V.
Then total worst-case error is:
IL
(ERROR)
=
±
(100mV
0.001
+
0.5mV)
1A
100mV
=
±
6mA
Tracking Error VOS
IL (ERROR)% =61mAA • 100 = ± 0.6%.
Note: If source resistance exceeds 10k, bypass
capacitors should be used and the associated errors must
be included.
The VP-P output voltage is not precise (see VP-P Output
Voltage versus Load Current curve). There are two ways
VP-P can be used to power external networks without
excessive errors: (1) ratiometric networks and (2) fast
settling references.
In a ratiometric network, the inputs are all proportional to
VP-P (see Figure 6). Consequently, for small changes, the
absolute value of VP-P does not affect accuracy.
It is critical that the inputs to the LTC1040 completely
settle within 4µs of the start of the comparison cycle and
that they do not change during the 80µs ON time. When
driving resistive networks with VP-P, capacitive loading on
VP-P OUTPUT
VIN +
VTRIP
+
1/2
+ LTC1040
OUTPUT
Pulsed Power (VP-P) Output
It is often desirable to use comparators with resistive
networks such as bridges. Because of the extremely low
power consumption of the LTC1040, the power consumed
by these resistive networks can far exceed that of the
device itself.
At low sample rates the LTC1040 spends most of its time
off. To take advantage of this, a pulsed power (VP-P) output
is provided. VP-P is switched to V+ when the comparator
is on and to a high impedance (open circuit) when the
comparator is off. The ON time is nominally 80µs.
Figure 5 shows the VP-P output circuit.
V+
18
LTC1040 • AI06
Figure 6. Ratiometric Network Driven by VP-P
the network should be minimized to meet the 4µs settling
time requirement. It is not recommended that VP-P be used
to drive networks with source impedances, as seen by the
inputs, of greater than 10k.
In applications where an absolute reference is required,
the VP-P output can be used to drive a fast settling
reference. The LT1009 2.5V reference, ideal in this
application, settles in approximately 2µs (see Figure 7).
The current through R1 must be large enough to supply
the LT1009 minimum bias current (1mA) and the load
current, IL.
VP-P OUTPUT
Q1 P1
80µs
COMPARATOR ON TIME
9
17
GND
VP-P
LTC1040 • AI05
Figure 5. VP-P Output Switch
R1
VIN
R2
LT1009 IL R3
+
1/2
+ LTC1040
LTC1040 • AI07
Figure 7. Driving Reference with VP-P Output
1040fa
7

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]