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LTC1257I View Datasheet(PDF) - Linear Technology

Part Name
Description
Manufacturer
LTC1257I Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1257
Full-Scale Voltage
vs Temperature
2.0495
2.0490
VCC = 5V
INTERNAL REFERENCE
2.0485
2.0480
2.0475
2.0470
2.0465
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1257 G07
Differential Nonlinearity (DNL)
0.5
0.0
–0.5
0 512 1024 1536 2048 2560 3072 3584 4098
CODE
1257 TA05
Zero-Scale Voltage
vs Temperature
0.9
0.8
VCC = 5V
INTERNAL REFERENCE
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1257 G08
Reference Compensation
Resistance vs CL
70
60
50
40
30
20
10
0
0.01
0.1
1
CL (µF)
10
100
1257 G11
Integral Nonlinearity (INL)
2.0
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2 VCC = 5V
INTERNAL REFERENCE
–1.6 TA = 25°C
–2.0
0 512 1024 1536 2048 2560 3072 3584 4096
CODE
1257 G09
Broadband Noise
CODE = FFFH
BW = 3Hz TO 1MHz
GAIN = 1100×
TIME = 5ms/DIV
1257 G12
PIN FUNCTIONS
CLK (Pin 1): The TTL level input for the serial interface clock.
DIN (Pin 2): The TTL level input for the serial interface
data. Data on the DIN pin is latched into the shift register
on the rising edge of the serial clock.
LOAD (Pin 3): The TTL level input for the serial interface
load control. Data is loaded from the shift register into the
DAC register, thus updating the DAC output when LOAD
is pulled low. The DAC register is transparent as long as
LOAD is held low.
DOUT(Pin 4): The output of the shift register which becomes
valid on the rising edge of the serial clock. The DOUT pin
is driven from GND to VCC by an internal CMOS inverter.
Multiple LTC1257s may be cascaded by connecting the
DOUT pin to the DIN pin of the next chip.
GND (Pin 5): Ground.
REF (Pin 6): The output of the 2.048V reference and the
input to the DAC resistor ladder. An external reference
with voltage from 2.475V to VCC – 2.7V may be used to
override the internal reference.
1257fc
5

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