LTC1257I View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC1257I

Complete Single Supply 12-Bit Voltage Output DAC in SO-8

Linear Technology 

LTC1257

PIN FUNCTIONS

VOUT (Pin 7): The buffered DAC output is capable of

sourcing 2mA over temperature while pulling within 2.7V

of VCC. The output will pull to ground through an internal

250Ω equivalent resistance.

VCC (Pin 8): The positive supply input. 4.75V ≤ VCC ≤

15.75V. Requires a bypass capacitor to ground.

DEFINITIONS

LSB: The least significant bit or the ideal voltage difference

between two successive codes.

LSB = (VFS – VOS)/2n – 1

n = The number of digital input bits

VOS = The zero code error or offset of the DAC

VFS = The full-scale output voltage of the DAC

measured when all bits are set to 1

Resolution: The resolution is the number of DAC output

states (2n) that divide the full-scale range. The resolution

does not imply linearity.

INL: End-point integral nonlinearity is the maximum devia-

tion from a straight line passing through the end-points of

the DAC transfer curve. Because the part operates from

a single supply and the output cannot go below ground,

the linearity is measured between full-scale and the first

code that guarantees a positive output. The INL error at

a given input code is calculated as follows:

INL = (VOUT – VIDEAL)/LSB

VIDEAL = (Code)(LSB) + VOS

VOUT = The output voltage of the DAC measured at

the given input code

DNL: Differential nonlinearity is the difference between

the measured change and the ideal 1LSB change between

any two adjacent codes. The DNL error between any two

codes is calculated as follows:

DNL = (∆VOUT – LSB)/LSB

∆VOUT = The measured voltage difference between two

adjacent codes

Offset Error: The theoretical voltage at the output when

the DAC is loaded with all zeros. The output amplifier can

have a true negative offset, but because the part is oper-

ated from a single supply, the output cannot go below

ground. If the offset is negative, the output will remain

near 0V resulting in the transfer curve shown in Figure 1.

6

OUTPUT

VOLTAGE

{ NEGATIVE

OFFSET

DAC CODE

0V

1257 F01

Figure 1. Effect of Negative Offset

The offset of the part is measured at the first code that

produces an output voltage 0.5LSB greater than the

previous code:

VOS = VOUT – [(Code)(VFS)/(2n – 1)]

Full-Scale Error: Full-scale error is the difference between

the ideal and measured DAC output voltages with all bits

set to one (Code = 4095). The full-scale error includes the

offset error and is calculated as follows:

FSE = (VOUT – VIDEAL)/LSB

VIDEAL = (VREF)(1 – 2–n) – VOS

VREF = The reference voltage, either internal or external

Gain Error: Gain error is the difference between the ideal

and measured slope of the DAC transfer characteristic.

Gain error is equal to full-scale error minus offset error.

Digital Feedthrough: The glitch that appears at the analog

output caused by AC coupling from the digital inputs when

they change state. The area of the glitch is specified in

(nV)(sec).

1257fc

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