LTC1343
ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX
V.10 Receiver
VTH
Receiver Input Threshold Voltage
∆VTH
IIN
RIN
tr, tf
t PLH
tPHL
V.28 Driver
Receiver Input Hysteresis
Receiver Input Current
Receiver Input Impedance
Rise or Fall Time
Input to Output
Input to Output
0°C ≤ TA ≤ 70°C
–7V ≤ VCM ≤ 7V, – 40°C ≤ TA ≤ 85°C
– 10V ≤ VA ≤ 10V
– 10V ≤ VA ≤ 10V
(Figures 5, 9)
(Figures 5, 9)
(Figures 5, 9)
q – 0.2
q – 0.3
q
q
q 20
0.2
0.3
11
50
±0.50
30
15
350
350
VO
Output Voltage
ISS
Short-Circuit Current
IOZ
Output Leakage Current
Open Circuit
RL = 3k (Figure 4)
VO = GND
– 0.25V ≤ VO ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
q ±5
q
q
7.6
±0.01
± 10
± 150
± 100
SR
Slew Rate
tPLH
Input to Output
t PHL
Input to Output
V.28 Receiver
(Figures 4, 8), RL = 3k, CL = 2500pF
(Figures 4, 8), RL = 3k, CL = 2500pF
(Figures 4, 8), RL = 3k, CL = 2500pF
q 4.0
q
q
30.0
1.6
2.5
1.6
2.5
VTHL
VTLH
∆VTH
RIN
tr, tf
tPLH
tPHL
Input Low Threshold Voltage
Input High Threshold Voltage
Receiver Input Hysteresis
Receiver Input Impedance
Rise or Fall Time
Input to Output
Input to Output
– 15V ≤ VA ≤ 15V
(Figures 5, 9)
(Figures 5, 9), CTRL = 0V
CTRL = VCC
(Figures 5, 9), CTRL = 0V
CTRL = VCC
q
1.4
0.8
q 2.0
1.4
q 0.1
0.4
1.0
q
3
5
7
15
110
q
330 800
170
q
480 800
UNITS
V
V
mV
mA
kΩ
ns
ns
ns
V
V
mA
µA
V/µs
µs
µs
V
V
V
kΩ
ns
ns
ns
ns
ns
Note 1: Absolute Maximum Ratings are those beyond which the safety of a
device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
Note 3: All typicals are given for VCC = 5V, C1 = C2 = CVCC = CVDD = 1µF,
CVEE = 3.3µF tantalum capacitors and TA = 25°C.
PIN FUNCTIONS
VDD (Pin 1): Generated Positive Supply Voltage for
RS232. Connect a 1µF capacitor to ground.
C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1+ and C1 –.
PWRVCC (Pin 3): Positive Supply for the Charge Pump.
4.75V ≤ PWRVCC ≤ 5.25V. Tie to VCC (Pin 8) and bypass
with a 1µF capacitor to ground.
C1–␣ (Pin 4): Capacitor C1 Negative Terminal.
D1 (Pin 5): TTL Level Driver 1 Input.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input. Becomes a CMOS
level output when the chip is in the echoed clock mode
(EC = 0V).
5