1483 View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
1483 Datasheet PDF : 8 Pages
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LTC1483
UW
W
SWITCHI G TI E WAVEFOR S
VOH
RO
VOL
VOD2
A–B
– VOD2
1.5V
OUTPUT
t PHL
tr ≤ 10ns, tf ≤ 10ns
t PLH
0V
INPUT
Figure 7. Receiver Propagation Delays
1.5V
0V
LTC1483 • F07
3V
RE
0V
5V
RO
RO
0V
1.5V
tr ≤ 10ns, tf ≤ 10ns
tZL(SHDN), tZL
t LZ
1.5V
OUTPUT NORMALLY LOW
1.5V
0.5V
1.5V
OUTPUT NORMALLY HIGH
0.5V
tZH(SHDN), tZH
t HZ
Figure 8. Receiver Enable and Disable Times
LTC1483 • F08
UU W U
APPLICATIO S I FOR ATIO
Basic Theory of Operation
Traditionally RS485 transceivers have been designed us-
ing bipolar technology because the common-mode range
of the device must extend beyond the supplies and the
device must be immune to ESD damage and latch-up.
Unfortunately, most bipolar devices draw a large amount
of supply current, which is unacceptable for the numerous
applications that require low power consumption. The
LTC1483 is a CMOS RS485/RS422 transceiver which
features ultra-low power consumption without sacrificing
ESD and latch-up immunity.
The LTC1483 uses a proprietary driver output stage,
which allows a common-mode range that extends beyond
the power supplies while virtually eliminating latch-up and
providing excellent ESD protection. Figure 9 shows the
LTC1483 output stage while Figure 10 shows a conven-
tional CMOS output stage.
When the conventional CMOS output stage of Figure 10
enters a high impedance state, both the P-channel (P1)
and the N-channel (N1) are turned off. If the output is then
driven above VCC or below ground, the P+/N -well diode
(D1) or the N+/P-substrate diode (D2) respectively will
turn on and clamp the output to the supply. Thus, the
output stage is no longer in a high impedance state and is
not able to meet the RS485 common-mode range require-
ment. In addition, the large amount of current flowing
through either diode will induce the well-known CMOS
latch-up condition, which could destroy the device.
VCC
SD3
P1
VCC
P1
D1
LOGIC
OUTPUT
SD4
LOGIC
N1
D2
N1
D1
OUTPUT
D2
LTC1483 • F09
Figure 9. LTC1483 Output Stage
LTC1483 • F10
Figure 10. Conventional
CMOS Output Stage
6
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