LTC3541-2(RevA) View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC3541-2
(Rev.:RevA)

High Efficiency Buck + VLDO Regulator

Linear Technology 

LTC3541-2

U

OPERATIO

When the MODE pin is driven to a logic high the LTC3541-2

operates in Pulse-Skip mode for low output voltage ripple.

In this mode, the LTC3541-2 continues to switch at a

constant frequency down to very low currents, where it

will begin skipping pulses used to control the main (top)

switch to maintain the proper average inductor current.

If the input supply voltage is decreased to a value ap-

proaching the output voltage, the duty cycle of the buck

is increased toward maximum on-time and 100% duty

cycle. The output voltage will then be determined by the

input voltage minus the voltage drop across the main

switch and the inductor.

VLDO/Linear Regulator Loop

In the LTC3541-2, the VLDO and linear regulator loops

consist of an amplifier and N-channel MOSFET output

stages that servo the output to maintain a regulator output

voltage, LVOUT. The internal reference voltage provided to

the amplifier is 0.4V allowing for a wide range of output

voltages. Loop configurations enabling the VLDO or the

linear regulator are stable with an output capacitance as

low as 2.2µF and as high as 100µF. Both the VLDO and

the linear regulators are capable of operating with an input

voltage, VIN, as low as 2.9V.

The VLDO regulator is designed to provide up to 300mA

of output current at a very low LVIN to LVOUT voltage. This

allows a clean, secondary, analog supply voltage to be

provided with a minimum drop in efficiency. The VLDO

regulator is provided with thermal protection that is de-

signed to disable the VLDO function when the output, pass

transistor’s junction temperature reaches approximately

160°C. In addition to thermal protection, short-circuit

detection is provided to disable the VLDO function when a

short-circuit condition is sensed. This circuit is designed

such that an output current of approximately 1A can be

provided before this circuit will trigger. As detailed in the

Electrical Characteristics, the VLDO regulator will be out

of regulation when this event occurs. Both the thermal

and short-circuit faults, when detected, are treated as

catastrophic fault conditions. The LTC3541-2 will be

reset upon the detection of either event.

The N-channel MOSFET, incorporated in the VLDO regula-

tor, has its drain connected to the LVIN pin as shown in

Figure 1. To ensure reliable operation, the LVIN voltage

must be stable before the VLDO regulator is enabled. For

the case where the voltage on the LVIN pin is supplied by

the buck regulator, the internal power supply sequenc-

ing logic assures voltages are applied in the appropriate

manner. For the case where an external supply is used to

power the LVIN pin, the externally supplied LVIN voltage

must be stable 1ms before the ENVLDO is brought from

a low to a high. Further, the externally supplied LVIN must

be reduced in conjunction with VIN whenever VIN is pulled

low or removed.

The linear regulator is designed to provide a lower output

current than that available from the VLDO regulator. The

linear regulator’s output, pass transistor has its drain tied

to the VIN rail. This allows the linear regulator to be turned

on prior to, and independent of, the buck regulator which

ordinarily drives the VLDO regulator. The linear regulator

is provided with thermal protection that is designed to

disable the linear regulator function when the output pass

transistor’s junction temperature reaches approximately

160°C. In addition to thermal protection, short-circuit

detection is provided to disable the linear regulator func-

tion when a short-circuit condition is sensed. This circuit

is designed such that an output current of approximately

120mA can be provided before this circuit will trigger. As

detailed in the Electrical Characteristics, the linear regulator

will be out of regulation when this event occurs. Both the

thermal and short-circuit faults are treated as catastrophic

fault conditions. The LTC3541-2 will be reset upon the

detection of either event.

The N-channel MOSFET, incorporated in the linear regu-

lator, has its drain connected to the VIN pin as shown in

Figure 1. The size of these MOSFETs and their associated

power bussing is designed to accomodate 30mA of DC

current. Currents above this value can be supported for

short periods as stipulated in the Absolute Maximum

Ratings.

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