LTC3541EDD-3 View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC3541EDD-3

High Efficiency Buck + VLDO Regulator

Linear Technology 

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OPERATIO

The LTC3541-3 contains a high efficiency synchronous

buck converter, a very low dropout regulator (VLDO) and

a linear regulator. It can be used to provide up to two

output voltages from a single input voltage making the

LTC3541-3 ideal for applications with limited board space.

The combination and configuration of these major blocks

within the LTC3541-3 is determined by way of the control

pins ENBUCK and ENVLDO as defined in Table 1.

With the ENBUCK pin driven to a logic high and ENVLDO

driven to a logic low, the LTC3541-3 enables the buck

converter to efficiently reduce the voltage provided at the

VIN input pin to an output voltage of 1.8V as determined by

an internal feedback resistor network. The buck regulator

can be configured for Pulse-Skip or Burst Mode opera-

tion by driving the MODE pin to a logic high or logic low

respectively. The buck regulator is capable of providing

a maximum output current of 500mA, which must be

taken into consideration when using the buck regulator

to provide the power for both the VLDO regulator and for

external loads.

With the ENBUCK pin driven to a logic low and ENVLDO

driven to a logic high, the LTC3541-3 enables the linear

regulator, providing a low noise regulated output voltage of

1.575V at the LVOUT pin while drawing minimal quiescent

current from the VIN input pin. This feature allows output

voltage LVOUT to be brought into regulation without the

presence of the LVIN voltage.

With the ENBUCK and ENVLDO pins both driven to a logic

high, the LTC3541-3 enables the high efficiency buck con-

verter and VLDO, providing dual output operation from a

single input voltage. When configured in this manner, the

LTC3541-3’s auto start-up sequencing feature will initally

bring the VLDO/linear regulator output (1.575V) into regula-

tion in a controlled manner using the linear regulator prior

to enabling the buck output (1.8V) without the need for

external pin control. The LTC3541-3 automatically transi-

tions the VLDO/linear regulator output (1.575V) from the

linear regulator to the VLDO regulator within 20ms of buck

soft-start initiation. A detailed discussion of the transitions

between the VLDO regulator and linear regulator can be

found in the VLDO/Linear Regulator Loop section.

LTC3541-3

Buck Regulator Control Loop

The LTC3541-3 internal buck regulator uses a constant

frequency, current mode, step-down architecture. Both the

main (top, P-channel MOSFET) and synchronous (bottom,

N-channel MOSFET) switches are internal. During normal

operation, the internal main switch is turned on at the be-

ginning of each clock cycle provided the internal feedback

voltage to the buck is less than the reference voltage. The

current into the inductor provided to the load increases

until the current limit is reached. Once the current limit is

reached the main switch turns off and the energy stored

in the inductor flows through the bottom synchronous

switch into the load until the next clock cycle.

The peak inductor current is determined by comparing the

buck feedback signal to an internal 0.8V reference. When

the load current increases, the output of the buck and

hence the buck feedback signal decrease. This decrease

causes the peak inductor current to increase until the aver-

age inductor current matches the load current. While the

main switch is off, the synchronous switch is turned on

until either the inductor current starts to reverse direction

or the beginning of a new clock cycle.

When the MODE pin is driven to a logic low, the LTC3541‑3

buck regulator operates in Burst Mode operation for high

efficiency. In this mode, the main switch operates based

upon load demand. In Burst Mode operation the peak

inductor current is set to a fixed value, where each burst

event can last from a few clock cycles at light loads to

nearly continuous cycling at moderate loads. Between

burst events the main switch and any unneeded circuitry

are turned off, reducing the quiescent current. In this sleep

state, the load is being supplied solely from the output

capacitor. As the output voltage droops, an internal error

amplifier’s output rises until a wake threshold is reached

causing the main switch to again turn on. This process

repeats at a rate that is dependant upon the load current

demand.

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