MCM67Q909ZP12 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
MCM67Q909ZP12 Datasheet PDF : 10 Pages
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CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Max
Unit
Address and Data Input Capacitance
Control Pin Input Capacitance
Output Capacitance
Cin
Cin
Cout
6
pF
6
pF
8
pF
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 5%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
READ/WRITE CYCLE TIMING (See Notes 1, 2, 3 and 4)
MCM67Q909–12
Parameter
Symbol
Min
Max
Unit Notes
Cycle Time
Clock Access Time
Clock Low Pulse Width
Clock High Pulse Width
Clock High to Data Output Invalid
Clock High to Data Output High–Z
Setup Times:
tKHKH
12
tKHQV
—
tKLKH
4
tKHKL
4
tKHQX
2
tKHQZ
—
A
tAVKH
3
W
tWVKH
E
tEVKH
G
tGVKH
D0 – D8
tDVKH
—
ns
1
5
ns
2
—
ns
—
ns
—
ns
5
ns
3
—
ns
4
Hold Times:
A
tKHAX
2
W
tKHWX
E
tKHEX
G
tKHGX
D0 – D8
tKHDX
—
ns
4
NOTES:
1. All read and write cycles are referenced from K.
2. Valid data from clock high will be the data stored at the address or the last valid read cycle.
3. Measured at ± 200 mV from steady state.
4. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for ALL rising
edges of clock (K) while the device is selected.
OUTPUT
Z0 = 50 Ω
RL = 50 Ω
VL = 1.5 V
Figure 1. AC Test Load
MCM67Q909
4
MOTOROLA FAST SRAM
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