HP3103 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
HP3103 Datasheet PDF : 7 Pages
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HPLR3103, HPLU3103
Absolute Maximum Ratings TC = 25oC, Unless Othewise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Single Pulse Avalanche Energy (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . .
Derate Above 25oC
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PD
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
HPLR3103, HPLU3103
30
30
±16V
52
390
240
89
0.71
-55 to 150
300
260
UNITS
V
V
V
A
A
mj
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Drain to Source Breakdown Voltage
Gate to Source Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Breakdown Voltage Temperature
Coefficient
Drain to Source On Resistance
(Note 3)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time (Note 3)
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Internal Source Inductance
Internal Drain Inductance
BVDSS ID = 250µA, VGS = 0V
30
VGS(TH) VGS = VDS, ID = 250µA
1
IDSS VDS = 30V, VGS = 0V
-
VDS = 24V, VGS = 0V, TC = 125oC
-
IGSS VGS = ±16V
-
∆V(BR)DSS Reference to 25oC, ID = 1mA
-
/∆TJ
rDS(ON) ID = 28A, VGS = 10V
-
ID = 23A, VGS = 4.5V
-
td(ON) VDD = 15V, ID ≅ 34A, RL = 0.441Ω, VGS = 4.5V, -
tr
RGS =3.4Ω, Ig(REF) = 3mA
-
td(OFF)
-
tf
-
Qg
VDD = 24V
-
Qgs
ID ≅ 34A,
VGS = 4.5V
-
Q gd
(Figure 6)
-
CISS VDS = 25V, VGS = 0V,
-
f = 1MHz (Figure 5)
COSS
-
C RSS
-
LS
Measured From the
Modified MOSFET -
Source Lead, 6mm (0.25in) Symbol Showing
From Package to Center of the Internal Devic-
Die
es Inductances
LD
Measured From the Drain-
Lead, 6mm (0.25in) From
Package to Center of Die
D
-
LD
G
LS
S
TYP
-
-
-
-
-
0.037
-
-
9
210
20
54
-
-
-
1600
640
320
7.5
4.5
MAX
-
-
25
250
100
-
UNITS
V
V
µA
µA
nA
V
0.019 Ω
0.024 Ω
-
ns
-
ns
-
ns
-
ns
50
nC
14
nC
28
nC
-
pF
-
pF
-
pF
-
nH
-
nH
©2001 Fairchild Semiconductor Corporation
HPLR3103, HPLU3103 Rev. B
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