M2S56D20TP-10 View Datasheet(PDF) - Mitsumi

Part Name

Description

Manufacturer

M2S56D20TP-10

256M Double Data Rate Synchronous DRAM

Mitsumi 

DDR SDRAM (Rev.0.0)

Sep.'99 Preliminary

MITSUBISHI LSIs

M2S56D20/ 30 TP

256M Double Data Rate Synchronous DRAM

FUNCTION TRUTH TABLE (continued)

Current State /CS /RAS /CAS /WE Address

RE-

H X X XX

FRESHING L H H H X

L H H L BA

L H L X BA, CA, A10

L L H H BA, RA

L L H L BA, A10

L L L HX

Op-Code,

L

L

L

L

Mode-Add

MODE

H X X XX

REGISTER

L

H H HX

SETTING

L H H L BA

L H L X BA, CA, A10

L L H H BA, RA

L L H L BA, A10

L L L HX

Op-Code,

L

L

L

L

Mode-Add

Command

Action

DESEL NOP (Idle after tRC)

NOP

NOP (Idle after tRC)

TERM

ILLEGAL

READ / WRITE ILLEGAL

ACT

ILLEGAL

PRE / PREA ILLEGAL

REFA

ILLEGAL

MRS

ILLEGAL

DESEL NOP (Idle after tRSC)

NOP

NOP (Idle after tRSC)

TERM

ILLEGAL

READ / WRITE ILLEGAL

ACT

ILLEGAL

PRE / PREA ILLEGAL

REFA

ILLEGAL

MRS

ILLEGAL

Notes

ABBREVIATIONS:

H=High Level, L=Low Level, X=Don't Care

BA=Bank Address, RA=Row Address, CA=Column Address, NOP=No Operation

NOTES:

1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.

2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of

that bank.

3. Must satisfy bus contention, bus turn around, write recovery requirements.

4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.

5. ILLEGAL if any bank is not idle.

ILLEGAL = Device operation and/or data-integrity are not guaranteed.

MITSUBISHI

ELECTRIC

10

Share Link: