M2V56S20ATP View Datasheet(PDF) - Mitsumi
Part Name
Description
Manufacturer
M2V56S20ATP Datasheet PDF : 49 Pages
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SDRAM (Rev.1.01)
Single Data Rate
Jul '01
MITSUBISHI LSIs
M2V56S20/ 30/ 40 ATP -5, -6, -7
256M Synchronous DRAM
FUNCTION TRUTH TABLE (continued)
Current State /CS
RE-
H
FRESHING
L
L
/RAS /CAS /WE
Address
X
X
XX
H
H
HX
H
H
LX
Command
DESEL
NOP
TBST
Action
NOP (Idle after tRC)
NOP (Idle after tRC)
ILLEGAL
L
H
L
X BA, CA, A10 READ / WRITE ILLEGAL
L
L
H
H BA, RA
ACT
ILLEGAL
L
L
H
L BA, A10
L
L
L
HX
Op-Code,
L
L
L
L
Mode-Add
MODE
H
X
X
XX
REGISTER L
H
H
HX
SETTING
L
H
H
LX
PRE / PREA ILLEGAL
REFA
ILLEGAL
MRS
ILLEGAL
DESEL
NOP
TBST
NOP (Idle after tRSC)
NOP (Idle after tRSC)
ILLEGAL
L
H
L
X BA, CA, A10 READ / WRITE ILLEGAL
L
L
H
H BA, RA
ACT
ILLEGAL
L
L
H
L BA, A10
L
L
L
HX
Op-Code,
L
L
L
L Mode-Add
PRE / PREA ILLEGAL
REFA
ILLEGAL
MRS
ILLEGAL
ABBREVIATIONS:
H=High Level, L=Low Level, X=Don't Care
BA=Bank Address, RA=Row Address, CA=Column Address, NOP=No OPeration
NOTES:
1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of
that bank.
3. Must satisfy bus contention, bus turn around, write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.
5. ILLEGAL if any bank is not idle.
ILLEGAL = Device operation and/or data-integrity are not guaranteed.
MITSUBISHI ELECTRIC
10
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