M41T64(2004) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M41T64
(Rev.:2004)

Serial Access Real-Time Clock with Alarms

STMicroelectronics 

M41T62/63/64/65

CLOCK OPERATION

The M41T6X is driven by a quartz-controlled oscil-

lator with a nominal frequency of 32.768KHz. The

accuracy of the Real-Time Clock depends on the

frequency of the quartz crystal that is used as the

time-base for the RTC. The M41T6X is tested to

meet ±35 ppm with a nominal crystal.

The eight byte clock register (see Table

3., page 13) is used to both set the clock and to

read the date and time from the clock, in a binary

coded decimal format. Tenths/Hundredths of Sec-

onds, Seconds, Minutes, and Hours are contained

within the first four registers.

Note: A WRITE to any clock register will result in

the Tenths/Hundredths of Seconds being reset to

“00,” and Tenths/Hundredths of Seconds cannot

be written to any value other than “00.”

Bits D0 through D2 of Register 04h contain the

Day (day of week). Registers 05h, 06h, and 07h

contain the Date (day of month), Month, and

Years. The ninth clock register is the Calibration

Register (this is described in the Clock Calibration

section). Bit D7 of Register 01h contains the STOP

Bit (ST). Setting this bit to a '1' will cause the oscil-

lator to stop. When reset to a '0' the oscillator re-

starts within one second (typical).

Note: Upon initial power-up, the user should set

the ST Bit to a '1,' then immediately reset the ST

Bit to '0.' This provides an additional “kick-start” to

the oscillator circuit.

Bit D7 of Register 02h (Minute Register) contains

the Oscillator Fail Interrupt Enable Bit (OFIE).

When the user sets this bit to '1,' any condition

which sets the Oscillator Fail Bit (OF) (see Oscilla-

tor Stop Detection, page 22) will also generate an

interrupt output.

Bits D6 and D7 of Clock Register 06h (Century/

Month Register) contain the CENTURY Bit 0

(CB0) and CENTURY Bit 1 (CB1).

Note: A WRITE to ANY location within the first

eight bytes of the clock register (00h-07h), includ-

ing the OFIE Bit, RS0-RS3 Bit, and CB0-CB1 Bits

will result in an update of the system clock and a

reset of the divider chain. This could result in an in-

advertent change of the current time. These non-

clock related bits should be written prior to setting

the clock, and remain unchanged until such time

as a new clock time is also written.

The eight Clock Registers may be read one byte at

a time, or in a sequential block. Provision has been

made to assure that a clock update does not occur

while any of the eight clock addresses are being

read. If a clock address is being read, an update of

the clock registers will be halted. This will prevent

a transition of data during the READ.

TIMEKEEPER® Registers

The M41T6X offers 16 internal registers which

contain Clock, Calibration, Alarm, Watchdog,

Flags, and Square Wave. The Clock registers are

memory locations which contain external (user ac-

cessible) and internal copies of the data (usually

referred to as BiPORT™ TIMEKEEPER cells). The

external copies are independent of internal func-

tions except that they are updated periodically by

the simultaneous transfer of the incremented inter-

nal copy. The internal divider (or clock) chain will

be reset upon the completion of a WRITE to any

clock address (00h to 07h).

The system-to-user transfer of clock data will be

halted whenever the address being read is a clock

address (00h to 07h). The update will resume ei-

ther due to a Stop Condition or when the pointer

increments to a non-clock address.

TIMEKEEPER and Alarm Registers store data in

BCD format. Calibration, Watchdog, and Square

Wave Bits are written in a Binary Format.

12/31

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