M48Z35
M48Z35Y
256Kbit (32Kbit x 8) ZEROPOWER® SRAM
Features
â– Integrated, ultra low power SRAM, power-fail
control circuit, and battery
â– READ cycle time equals WRITE cycle time
â– Automatic power-fail chip deselect and WRITE
protection
â– WRITE protect voltages:
(VPFD = Power-fail Deselect Voltage)
– M48Z35: VCC = 4.75 to 5.5V
4.5V ≤ VPFD ≤ 4.75V
– M48Z35Y: 4.5 to 5.5V
4.2v ≤ Vpfd ≤ 4.5v
â– Self-contained battery in the CAPHATâ„¢ DIP
package
â– Packaging includes a 28-lead SOIC and
SNAPHAT® top (to be ordered separately)
â– Pin and function compatible with JEDEC
standard 32K x 8 SRAMs
â– SOIC package provides direct connection for a
SNAPHAT top which contains the battery
â– RoHS compliant
– Lead-free second level interconnect
28
1
PCDIP28 (PC)
Battery CAPHAT
SNAPHAT (SH)
Battery
28
1
SOH28 (MH)
November 2007
Rev 7
1/23
www.st.com
1