AS7C31024-15TJC View Datasheet(PDF) - Alliance Semiconductor

Part Name

Description

Manufacturer

AS7C31024-15TJC

5V/3.3V 128K×8 CMOS SRAM (Evolutionary Pinout)

Alliance Semiconductor 

AS7C1024

AS7C31024

®

Read cycle (over the operating range)

-10

-12

-15

-20

Parameter

Symbol Min Max Min Max Min Max Min Max Unit Notes

Read cycle time

Address access time

Chip enable (CE1) access time

Chip enable (CE2) access time

Output enable (OE) access time

Output hold from address change

CE1 Low to output in low Z

CE2 High to output in low Z

CE1 Low to output in high Z

CE2 Low to output in high Z

OE Low to output in low Z

OE High to output in high Z

Power up time

Power down time

tRC 10 – 12 – 15 – 20 –

ns

tAA

– 10 – 12 – 15 – 20 ns

3

tACE1 – 10 – 12 – 15 – 20 ns

3, 12

tACE2 – 10 – 12 – 15 – 20 ns

3, 12

tOE

–3–3–4–5

ns

tOH

2–3–3–3–

ns

5

tCLZ1 3 – 3 – 3 – 3 –

ns 4, 5, 12

tCLZ2 3 – 3 – 3 – 3 –

ns 4, 5, 12

tCHZ1 – 3 – 3 – 4 – 5

ns 4, 5, 12

tCHZ2 – 3 – 3 – 4 – 5

ns 4, 5, 12

tOLZ

0

–

0

–

0

–

0

–

ns

4, 5

tOHZ – 3 – 3 – 4 – 5

ns

4, 5

tPU

0–0–0–0–

ns 4, 5, 12

tPD

– 10 – 12 – 15 – 20 ns 4, 5, 12

Key to switching waveforms

Rising input

Falling input

Undefined / don’t care

Read waveform 1 (address controlled)

tRC

Address

tAA

DOUT

tOH

Data valid

Read waveform 2 (CE1, CE2, and OE controlled)

CE1

tRC1

CE2

tOE

OE

tOLZ

tOHZ

DOUT

tACE1, tACE2

Data valid

tCHZ1, tCHZ2

Current

supply

tCLZ1, tCLZ2

tPU

50%

tPD

ICC

50%

ISB

4

ALLIANCE SEMICONDUCTOR

11/29/00

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