MAX2101 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX2101 Datasheet PDF : 24 Pages
| |||
6-Bit Quadrature Digitizer
______________________________________________________________Pin Description
PIN
1, 9,
12, 13,
18, 19,
63, 67,
82, 83,
89, 92,
98, 99
2
3
NAME
GND
VGNDQ
BBINQ
4
FTUNEQ
5
OFFQ
6
BBOUTQ
7
BBOUTQB
8
10
11
14
15
16
17
20, 21
22, 59
23
VCCQ
VGNDP
VCCP
TNKB
VCC2
VGND2
TNKA
VGNDAD
VSUBAD
VCOPRE
24
VCOPREB
25, 29,
38, 40,
44, 52
26
27
28
30, 37,
43, 51,
55
31
32
33, 48
34, 47
VCCO
VGNDO
D5Q
D4Q
VGNDO
D3Q
D2Q
VCCD
VGNDD
FUNCTION
Ground
Q Channel Baseband Ground
Q Channel Baseband Amplifier,
External Input
Q Channel Filter Cutoff
Frequency Control
Q Channel Baseband Amplifier
Offset Adjust
Q Channel Baseband Amplifier
Output
Q Channel Baseband Amplifier
Inverted Output
Q Channel Baseband +5V Supply
Prescaler Ground
Prescaler +5V Supply
Oscillator Resonator Port
Oscillator +5V Supply
Oscillator Ground
Oscillator Resonator Port
A/D Converter Ground
A/D Converter Substrate
Divide-by-16 Prescaler Output
Divide-by-16 Prescaler
Complementary Output
Digital Output +5V Supply
Digital Output Ground
Q Channel Data Output, bit 5 (MSB)
Q Channel Data Output, bit 4
Digital Output Ground
Q Channel Data Output, bit 3
Q Channel Data Output, bit 2
Digital Logic +5V Supply
Digital Logic Ground
PIN
35
36
39
41
42
45
46
49
50
53
54
56
57
58
60, 61
62
64
65
66
68
69
70
71
72
73
74
75
76
77
NAME
D1Q
D0Q
RCLK
DCLKB
DCLK
D0I
D1I
D2I
D3I
D4I
D5I
BINEN
S2
S1
VCCAD
S0
VCCC
MCLK
VGNDC
ENOPB
CQB
CQ
CI
CIB
VCCI
BBOUTIB
BBOUTI
OFFI
FTUNEI
FUNCTION
Q Channel Data Output, bit 1
Q Channel Data Output, bit 0 (LSB)
Reference Clock, divide by six from
master clock (MCLK)
Data Clock Complementary Output
Data Clock Output
I Channel Data Output, bit 0 (LSB)
I Channel Data Output, bit 1
I Channel Data Output, bit 2
I Channel Data Output, bit 3
I Channel Data Output, bit 4
I Channel Data Output, bit 5 (MSB)
Binary Enable
Programmable Sample Rate
Control Input, bit 2 (MSB)
Programmable Sample Rate
Control Input, bit 1
A/D Converter +5V Supply
Programmable Sample Rate
Control Input, bit 0 (LSB)
Clock Buffer +5V Supply
Master Clock
Clock Buffer Ground
Offset Correction/Enable Correction
Inverting Input Q Channel Offset
Correction
Noninverting Input Q Channel
Offset Correction
Noninverting Input I Channel Offset
Correction
Noninverting Input I Channel Offset
Correction
I Channel Baseband +5V Supply
I Channel Baseband Amplifier
Inverted Output
I Channel Baseband Amplifier Output
I Channel Baseband Amplifier
Offset Adjust
I Channel Filter Cutoff Frequency
Control
8 _______________________________________________________________________________________
Share Link: 