MAX2538 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX2538 Datasheet PDF : 27 Pages
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Quadruple-Mode PCS/Cellular/GPS LNA/Mixers
Pin Description
PIN
MAX2351
MAX2358
MAX2354
MAX2359
MAX2530
MAX2531
MAX2538
MAX2537
NAME
FUNCTION
1
1
—
1
1
CLNA_OUT Cellular LNA Output. Internally matched to 50Ω including an
on-chip DC-blocking capacitor.
2
—
2
2
—
PLNA_IN
PCS LNA Input. Requires a DC-blocking capacitor that can be
used as part of the matching network.
3
3, 27
3
3
3
GND Ground
4
4
—
4
4
CLNA_IN Cellular LNA Input. Requires a DC-blocking capacitor that can
be used as part of the matching network.
Shutdown Logic Input. A logic low shuts off the device, except
5
5
5
5
5
SHDN LO_OUT and PLL buffers, which are controlled by BUFFEN
and PLL pins, respectively.
6, 8
2, 6, 8
1, 4, 6, 8,
24
—
—
—
—
6
7
7
7
7
—
—
—
8
9
9
9
9
10, 20, 21
10, 20,
21, 25, 28
10, 20,
21, 27
—
—
—
—
10
11
11
11
11
12
12
12
12
2
N.C./GND Pin can be grounded or left open-circuit.
6
GLNA_IN
GPS LNA Input. Requires a DC-blocking capacitor, which can
be used as part of the matching network.
7
G1
Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
8
GLNA_OUT
GPS LNA Output. Internally matched to 50Ω including an on-
chip DC-blocking capacitor.
9
G2
Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
25, 28
I.C. Internally Connected. Do not make connections to this pin.
10
GMIX_IN GPS Mixer Input. Requires a DC-blocking capacitor, which
can be used as an interstage coupling capacitor.
11
MODE Operating Mode Logic Input. Sets device operating modes.
See Table 2 for details.
Bias Setting Pin. For nominal bias, connect a 20kΩ resistor to
12
BIAS ground. Adjust RBIAS to alter the linearity of the mixers and
LNAs.
Dual-Function Pin. LO buffer output port for driving an external
13
13
13
13
13
PLL
PLL synthesizer. A logic high (through a 10kΩ resistor)
enables the PLL buffer. A logic low disables the PLL buffer.
Leave open if not used. If open, PLL is low.
14
14
14
14
14
LO_IN
LO Input. Internally matched to 50Ω, including DC-blocking
capacitor.
15
15
15
15
15
BUFFEN
LO Buffer Enable Logic Input. A logic high enables the
external LO buffer port. Floats low.
8 _______________________________________________________________________________________
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