MB84VA2006 View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB84VA2006

8M (× 8/× 16) FLASH MEMORY & 1M (× 8) STATIC RAM

Fujitsu 

MB84VA2006-10/MB84VA2007-10

• Write Cycle (CEf control) (Flash)

ADDRESSES

3rd Bus Cycle

555H

PA

tWC

tAS

tAH

WE

OE

CEf

DQ

tWS

tWH

tGHEL

tCP

tCPH

tDS

A0H

tDH

PD

Data Polling

PA

tWHWH1

DQ7 DOUT

Notes: 1. PA is address of the memory location to be programmed.

2. PD is data to be programmed at byte address.

3. DQ7 is the output of the complement of the data written to the device.

4. DOUT is the output of the data written to the device.

5. Figure indicates last two bus cycles out of four bus cycle sequence

6. These waveforms are for the x16 mode. The addresses differ from x8 mode.

16

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