MB91106PFV-XXX View Datasheet(PDF) - Fujitsu
Part Name
Description
Manufacturer
MB91106PFV-XXX Datasheet PDF : 116 Pages
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MB91106 Series
s CPU CORE
1. Memory Space
The FR family has a logical address space of 4 Gbytes (232 bytes) and the CPU linearly accesses the memory
space.
• Memory space
• Memory Space
Address
0000 0000H
0000 0400H
0000 0800H
0000 1000H
0000 1800H
Single chip mode
I/0 Area
I/0 Area
Access inhibited
Embedded RAM
(2 Kbytes)
Internal ROM/
external bus mode
I/0 Area
I/0 Area
Access inhibited
Embedded RAM
(2 Kbytes)
External ROM/
external bus mode
I/0 Area
I/0 Area
Direct
addressing
area*
See “sI/O MAP”
Access inhibited
Embedded RAM
(2 Kbytes)
Access inhibited
Access inhibited
Access inhibited
0001 0000H
0008 0000H
0008 FC00H
000F 0000H
0010 0000H
FFFF FFFFH
Access inhibited
Instruction ROM
(63 Kbytes)
Access inhibited
Instruction ROM/data ROM
(64 Kbytes)
Access inhibited
External area
Instruction ROM
(63 Kbytes)
Access inhibited
Instruction ROM/data ROM
(64 Kbytes)
External area
External area
* : Direct addressing area
The following areas on the memory space are assigned to direct addressing area for I/O. In these areas, an
address can be specified in a direct operand of a code.
Direct areas consists of the following areas dependent on accessible data sizes.
Byte data access: 000H to 0FFH
Half word data access: 000H to 1FFH
Word data access: 000H to 3FFH
Notes: • Access to the external area can be execute in the single chip mode.
To access to the external area, select internal ROM external bus mode via mode resistor.
Never execute data access to the instruction ROM area.
• In the instruction/data ROM, images in block of 64 Kbytes can be seen.
Make an instruction/data in the area 000F0000H to 000FFFFFH.
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