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MB91106PFV-XXX View Datasheet(PDF) - Fujitsu

Part Name
Description
Manufacturer
MB91106PFV-XXX
Fujitsu
Fujitsu Fujitsu
MB91106PFV-XXX Datasheet PDF : 116 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MB91106 Series
Pin no.
LQFP*1 QFP*2
95,
98,
94
97
Pin name
INT0,
INT1
PE0,
PE1
89
92 INT2
SC1
PE2
88
91 INT3
SC2
PE3
87,
90, DREQ0,
86
89 DREQ1
PE4,
PE5
85
88 DACK0
PE6
*1: FPT-100P-M05
*2: FPT-100P-M06
Circuit
type
Function
E External interrupt request input pins
These pins are used for input during corresponding interrupt is
enabled, and it is necessary to disable output for other
functions from these pins unless such output is made
intentionally.
Can be configured as general purpose I/O ports when INT0
and INT1 are not used.
E External interrupt request input pin
This pin is used for input during corresponding interrupt is
enabled, and it is necessary to disable output for other
functions from this pin unless such output is made intentionally.
Clock I/O pin for UART1
Clock output is available when clock output of UART1 is
enabled.
Can be configured as general purpose I/O port when INT2 and
SC1 are not used.
This function is available when UART1 clock output is disabled.
E External interrupt request input pin
This pin is used for input during corresponding interrupt is
enabled, and it is necessary to disable output for other
functions from this pin unless such output is made intentionally.
UART2 clock I/O pin
Clock output is available when UART2 clock output is enabled.
Can be configured as general purpose I/O port when INT3 and
SC2 are not used.
This function is available when UART2 clock output is disabled.
E External transfer request input pins for DMA
These pins are used for input when external trigger is selected
to cause DMAC operation, and it is necessary to disable output
for other functions from these pins unless such output is made
intentionally.
Can be configured as general purpose I/O ports when DREQ0
and DREQ1 are not used.
E External transfer request acknowledge output pin for DMAC
(ch. 0)
This function is available when transfer request output for
DMAC is enabled.
Can be configured as general purpose I/O port when DACK0 is
not used.
This function is available when transfer request acknowledge
output for DMAC or DACK0 output is disabled.
(Continued)
9

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