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FR30 View Datasheet(PDF) - Fujitsu

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Description
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FR30 Datasheet PDF : 50 Pages
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MB91F127/F128
s HANDLING DEVICES
1. Preventing latch up
On a CMOS IC, latch up may occur when a voltage higher than VCC or a voltage lower than VSS is applied to
input terminal or output terminal, or when a voltage exceeding rated level is applied across VCC and VSS. Latch
up causes drastic increase of power source current, which may result in destruction of the element by heat.
Take extra care not to exceed maximum rating in use. Also, take extra care so that analog terminal does not
exceed digital power source.
2. Treatment of unused input terminals
Leaving unused terminals open may cause malfunction. Apply pull-up or pull-down treatment on unused
terminals.
3. External reset input
Complete resetting of internal system requires inputting “L” level signal to RST terminal for a minimum of
5 machine cycles.
4. Notes on using external clock
When using an external clock, supply a clock signal to X0 terminal and supply its antiphase clock to X1 terminal
simultaneously. In this case, do not use STOP mode (oscillation stop mode). (Because X1 terminal halts with
"H" output under STOP status.)
Under a 12.5 MHz frequency, the device operates with a clock supplied to X0 terminal only.
Figures show examples of using an external clock.
Example of using external clock (normal)
X0
X1
Note : STOP mode (oscillation stop mode) is not available.
Example of using external clock (allowed under operation at 12.5 MHz or lower frequency)
X0
OPEN
X1
10

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