MB91F273 View Datasheet(PDF) - Fujitsu
Part Name
Description
Manufacturer
MB91F273 Datasheet PDF : 86 Pages
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MB91270 Series
• Various timers
• 16-bit reload timer : 3 channels (including one channel for REALOS)
The internal clock can be divided by 2, 8, or 32
• 16-bit free-running timer: 4 channels
Output compare module: 8 channels
Input capture module: 8 channels
• 8/16-bit PPG timer: 8-bit x 16 channels or 16-bit x 8 channels
• Interrupt controller
• Interrupt from internal peripheral
• Software-selectable priority level (16 levels)
• D/A converter : 2 channels
8-bit or 10-bit resolution, R-2R type
• A/D converter: 24 channels (MB91V280 has an additional module with eight more channels)
• 10-bit resolution
• Successive approximation conversion type
Conversion time : 3 µs
• Conversion mode (single conversion mode, continuous conversion mode)
• Activation source (software, external trigger, peripheral interrupt)
• Other interval timer/counter
• 8/16-bit up down counter :
8 bits × 4 channels or 16 bits × 2 channels
• 16-bit timebase timer / watchdog timer
• I2C bus interface* (400 kbps): 3 channels
• Master/slave sending and receiving
• Arbitration and clock synchronization
• Hardware watchdog
Interval time: 569 ms (Min), 771 ms (Max)
(Use of self-oscillation circuit with timing (100 kHz) )
• I/O port
• Pull-up/pull-down can be controlled independently for each pin.
• The input level for each pin can be set to either CMOS Schmitt trigger levels or CMOS automotive Schmitt
trigger levels.
• The pin level can be read directly.
• Max 82 ports
• Other features
• Internal oscillator circuit as clock source, allowing PLL multiplication to be selected
• INIT is prepared as a reset pin.
• Watchdog timer reset, software reset
• Available low-power consumption modes are stop mode, sleep mode, and real time clock mode.
Supports low-power consumption operation with CPU operating at 32 kHz (“s” without only product).
• Gear function
• Built-in timebase timer
• Wild register
(Continued)
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