MB95120 View Datasheet(PDF) - Fujitsu
Part Name
Description
Manufacturer
MB95120 Datasheet PDF : 67 Pages
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MB95120 Series
■ PRODUCT LINEUP
Part number*1
Parameter
MB95F128D
MB95F128E
Type
Flash memory product
ROM capacity
60 Kbytes
RAM capacity
2 Kbytes
Reset output
No
Clock system
Dual clock
Low voltage
detection reset
No
CPU functions
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time : 61.5 ns (at machine clock frequency 16.25 MHz)
Interrupt processing time
: 0.6 µs (at machine clock frequency 16.25 MHz)
Ports (Max 87 ports)
General-purpose I/O port (N-ch open drain)
General-purpose I/O port (CMOS)
Programmable input voltage levels of port
CMOS input level / hysteresis input level
: 2 ports
: 85 ports
Timebase timer
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Reset generated cycle
At main oscillation clock 10 MHz
At sub oscillation clock 32.768 kHz
: Min 105 ms
: Min 250 ms
Wild register
Capable of replacing 3 bytes of ROM data
Master/slave sending and receiving
Bus error function and arbitration function
I2C
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
Data transfer capable in UART/SIO
Full duplex double buffer
Variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
LIN-UART
Dedicated reload timer allowing a wide range of communication speeds to be set
Full duplex double buffer
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
LIN functions available as the LIN master or LIN slave
8/10-bit A/D converter
(12 channels)
8-bit or 10-bit resolution can be selected
(Continued)
3
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