MBM29F080A-55PF View Datasheet(PDF) - Spansion Inc.

Part Name

Description

Manufacturer

MBM29F080A-55PF

FLASH MEMORY CMOS 8M (1M ×8) BIT

Spansion Inc. 

MBM29F080A-55/-70/-90

s FUNCTIONAL DESCRIPTION

Read Mode

The MBM29F080A has two control functions which must be satisfied in order to obtain data at the outputs. CE

is the power control and should be used for a device selection. OE is the output control and should be used to

gate data to the output pins if a device is selected.

Address access time (tACC) is equal to the delay from stable addresses to valid output data. The chip enable

access time (tCE) is the delay from stable addresses and stable CE to valid data at the output pins. The output

enable access time is the delay from the falling edge of OE to valid data at the output pins (assuming the

addresses have been stable for at least tACC-tOE time).

Standby Mode

There are two ways to implement the standby mode on the MBM29F080A device, one using both the CE and

RESET pins; the other via the RESET pin only.

When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at VCC ±0.3 V.

Under this condition the current consumed is less than 5 µA. A TTL standby mode is achieved with CE and

RESET pins held at VIH. Under this condition the current is reduced to approximately 1 mA. During Embedded

Algorithm operation, VCC Active current (ICC2) is required even CE = VIH. The device can be read with standard

access time (tCE) from either of these standby modes.

When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at VSS ±0.3 V

(CE = “H” or “L”). Under this condition the current consumed is less than 5 µA. A TTL standby mode is achieved

with RESET pin held at VIL (CE = “H” or “L”). Under this condition the current required is reduced to approximately

1 mA. Once the RESET pin is taken high, the device requires 500 ns of wake up time before outputs are valid

for read access.

In the standby mode the outputs are in the high impedance state, independent of the OE input.

Output Disable

With the OE input at a logic high level (VIH), output from the device is disabled. This will cause the output pins

to be in a high impedance state.

Autoselect

The autoselect mode allows the reading out of a binary code from the device and will identify its manufacturer

and type. This mode is intended for use by programming equipment for the purpose of automatically matching

the device to be programmed with its corresponding programming algorithm. This mode is functional over the

entire temperature range of the device.

To activate this mode, the programming equipment must force VID (11.5 V to 12.5 V) on address pin A9. Two

identifier bytes may then be sequenced from the device outputs by toggling address A0 from VIL to VIH. All

addresses are don't cares except A0, A1, and A6. (See “MBM29F080A Sector Protection Verify Autoselect Codes

Table” in “sFLEXIBLE SECTOR-ERASE ARCHITECTURE”.)

The manufacturer and device codes may also be read via the command register, for instances when the

MBM29F080A is erased or programmed in a system without access to high voltage on the A9 pin. The command

sequence is illustrated in “MBM29F080A Command Definitions Table” in “sFLEXIBLE SECTOR-ERASE AR-

CHITECTURE”. (Refer to Autoselect Command section.)

Byte 0 (A0 = VIL) represents the manufacturer's code (Fujitsu = 04h) and byte 1 (A0 = VIH) represents the device

identifier code for MBM29F080A = D5h. These two bytes are given in the “MBM29F080A Sector Protection

Verify Autoselect Codes Table” in “sFLEXIBLE SECTOR-ERASE ARCHITECTURE”. All identifiers for

manufactures and device will exhibit odd parity with DQ7 defined as the parity bit. In order to read the proper

device codes when executing the Autoselect, A1 must be VIL. (See “MBM29F080A Sector Protection Verify

Autoselect Codes Table” in “sFLEXIBLE SECTOR-ERASE ARCHITECTURE”.)

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