MBM29F080A-55PF View Datasheet(PDF) - Spansion Inc.

Part Name

Description

Manufacturer

MBM29F080A-55PF

FLASH MEMORY CMOS 8M (1M ×8) BIT

Spansion Inc. 

MBM29F080A-55/-70/-90

s AC CHARACTERISTICS

• Read Only Operations Characteristics

Parameter

Symbol

JEDEC Standard

Test

Setup

-55 *1

-70 *2

-90 *2

Unit

Min Max Min Max Min Max

Read Cycle Time

tAVAV

tRC

—

55 — 70 — 90 — ns

Address to Output Delay

tAVQV

tACC

CE = VIL

OE = VIL

—

55

—

70

—

90

ns

Chip Enable to Output Delay

tELQV

tCE

OE = VIL — 55 — 70 — 90 ns

Output Enable to Output Delay

tGLQV

tOE

—

— 30 — 30 — 40 ns

Chip Enable to Output HIGH-Z

tEHQZ

tDF

—

— 20 — 20 — 20 ns

Output Enable to Output HIGH-Z tGHQZ tDF

—

— 20 — 20 — 20 ns

Output Hold Time From Addresses,

CE or OE, Whichever Occurs First

tAXQX

tOH

—

0 — 0 — 0 — ns

RESET Pin Low to Read Mode

—

tREADY

—

— 20 — 20 — 20 µs

*1 : Test Conditions:

Output Load: 1 TTL gate and 30 pF

Input rise and fall times: 5 ns

Input pulse levels: 0.0 V or 3.0 V

Timing measurement reference level

Input: 1.5 V

Output: 1.5 V

*2 : Test Conditions:

Output Load: 1 TTL gate and 100 pF

Input rise and fall times: 5 ns

Input pulse levels: 0.45 V or 2.4 V

Timing measurement reference level

Input: 0.8 V and 2.0 V

Output: 0.8 V and 2.0 V

Device

Under

Test

CL

5.0 V

Diode=1N3064

or Equivalent

2.7 kΩ

6.2 kΩ

Diode=1N3064

or Equivalent

Notes : • MBM29F080A-55: CL = 30 pF including jig capacitance

• MBM29F080A-70/-90: CL = 100 pF including jig capacitance

Test Conditions

23

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