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AT90S2313 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
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AT90S2313 Datasheet PDF : 92 Pages
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AT90S2313
General Purpose
Register File
X-register, Y-register, and Z-
register
Figure 6 shows the structure of the 32 general purpose registers in the CPU.
Figure 6. AVR CPU General Purpose Working Registers
General
Purpose
Working
Registers
7
0
R0
R1
R2
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
Addr.
$00
$01
$02
$0D
$0E
$0F
$10
$11
$1A
$1B
$1C
$1D
$1E
$1F
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
All the register operating instructions in the instruction set have direct and single-cycle
access to all registers. The only exception is the five constant arithmetic and logic
instructions SBCI, SUBI, CPI, ANDI, ORI between a constant and a register and the LDI
instruction for load immediate constant data. These instructions apply to the second half
of the registers in the Register File (R16..R31). The general SBC, SUB, CP, AND, OR,
and all other operations between two registers or on a single register apply to the entire
Register File.
As shown in Figure 6, each register is also assigned a data memory address, mapping
them directly into the first 32 locations of the user Data Space. Although the Register
File is not physically implemented as SRAM locations, this memory organization pro-
vides great flexibility in access of the registers, as the X-, Y-, and Z-registers can be set
to index any register in the file.
The registers R26..R31 have some added functions to their general purpose usage.
These registers are the address pointers for indirect addressing of the Data Space. The
three indirect address registers X, Y and Z are defined in Figure 7.
Figure 7. X-, Y-, and Z-Registers
15
0
X-register
7
07
0
R27 ($1B)
R26 ($1A)
15
0
Y-register
7
07
0
R29 ($1D)
R28 ($1C)
15
0
Z-register
7
07
0
R31 ($1F)
R30 ($1E)
7
0839IAVR06/02

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