MC13783JVK5 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MC13783JVK5

Power Management and Audio Circuit

Freescale Semiconductor 

Introduction

regulators for the USB transceiver. The boost converter output has a backlight headroom tracking option

to reduce overall power consumption.

The regulators are directly supplied from the battery or from the switchers and include supplies for IO and

peripherals, audio, camera, multi media cards, SIM cards, memory and the transceivers. Enables for

external discrete regulators are included as well as a vibrator motor regulator. A dedicated preamplifier

audio output is available for multifunction vibrating transducers.

Drivers for power gating with external NMOS transistors are provided including a fully integrated charge

pump. This will allow to power down parts of the processor to reduce leakage current.

1.3 Battery Management

The MC13783 supports different charging and supply schemes including single path and serial path

charging. In single path charging, the phone is always supplied from the battery and therefore always has

to be present and valid. In a serial path charging scheme, the phone can operate directly from the charger

while the battery is removed or deeply discharged.

The charger interface provides linear operation via an integrated DAC and unregulated operation like used

for pulsed charging. It incorporates a standalone trickle charge mode in case of a dead battery with LED

indicator driver. Over voltage, short circuit and under voltage detectors are included as well as charger

detection and removal. The charger includes the necessary circuitry to allow for USB charging and for

reverse supply to an external accessory. The battery management is completed by a battery presence

detector and an A to D converter that serves for measuring the charge current, battery and other supply

voltages as well as for measuring the battery thermistor and die temperature.

1.4 Logic

The MC13783 is fully programmable via SPI bus. Additional communication is provided by direct logic

interfacing. Default startup of the device is selectable by hard-wiring the power up mode select pins.

Both the call processor and the applications processor have full access to the MC13783 resources via two

independent SPI busses. The primary SPI bus is able to allow the secondary SPI bus to control all or some

of the registers. On top of this an arbitration mechanism is built in for the audio, the power and ADC

functions. This together will avoid programming conflicts in case of a dual processor type of application.

The power cycling of the phone is driven by the MC13783. It has the interfaces for the power buttons and

dedicated signaling interfacing with the processor. It also ensures the supply of the memory and other

circuits from the coin cell in case of brief power failures. A charger for the coin cell is included as well.

Several pre-selectable power modes are provided such as SDRAM self refresh mode and user off mode.

The MC13783 provides the timekeeping based on an integrated low power oscillator running with a

standard watch crystal. This oscillator is used for internal clocking, the control logic, and as a reference

for the switcher PLL. The timekeeping includes time of day, calendar and alarm. The clock is put out to

the processors for reference and deep sleep mode clocking.

MC13783 Technical Data, Rev. 3.5

Freescale Semiconductor

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